参数资料
型号: MAX2233EEE+T
厂商: Maxim Integrated
文件页数: 5/8页
文件大小: 0K
描述: IC AMP POWER 900MHZ 16QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
频率: 800MHz ~ 1GHz
增益: 23.9dB
RF 型: ISM
电源电压: 2.7 V ~ 5.5 V
电流 - 电源: 25mA
封装/外壳: 16-LSSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
900MHz ISM-Band, 250mW Power Amplifiers
with Analog or Digital Gain Control
Pin Description
PIN
NAME
FUNCTION
MAX2232
MAX2233
1
2
3
1
2
RFIN
GND
SHDN
RF Input Port. Requires external matching network and blocking capacitor.
Input Stage Ground. Connect directly to low-inductance ground plane. If vias are used,
separate them from other GND pin vias.
Shutdown Control Input. Drive S HDN low to place the device in shutdown mode. Drive high
for normal operation.
Digital Gain/Shutdown Control Input. MSB of the 2-bit digital output power control. D0 and
3
D1
D1 set the output power to one of three discrete levels. To place the device in shutdown,
drive D0 and D1 low (Table 2).
Analog Gain-Control Input. Apply a voltage between 0.6V and 2.2V to vary the gain of the
4
CTRL
PA. Drive CTRL below 0.4V to place the device in standby mode. Drive CTRL above 2.2V to
place the device in peak output power mode.
Digital Gain/Shutdown Control Input. LSB of the 2-bit digital output power control. D0 and
4
D0
D1 set the output power to one of three discrete levels. To place the device in shutdown,
drive D0 and D1 low (Table 2).
5, 6
7
8
9
10
11
12
13
14
15
16
SLUG
5, 6
7
8
9, 13, 14
10
11
12
15
16
SLUG
GND
GND
RFOUT
N.C.
TSET
V CC
V CC
RAMP-
RAMP+
GND
V CC
GND
Second Stage Ground. Connect directly to low-inductance ground plane. If vias are used,
separate them from other GND pin vias.
Output Stage Ground. Connect directly to low-inductance ground plane. If vias are used,
separate them from other GND pin vias.
Open-Collector, RF Output Port. Connect output matching network to this pin.
No Connection. Do not make a connection to this pin.
Thermal Shutdown Timeout Capacitor Terminal. Connect a capacitor from TSET to ground
to limit thermal cycling.
Second Stage Supply Voltage. Bypass with appropriate capacitors to GND.
Input Stage Supply Voltage. Bypass with appropriate capacitors to GND.
Negative Terminal of Output Power Ramp Capacitor. Connect capacitor, C RAMP , between
RAMP+ and RAMP- to control the rise and fall time of the output power ramp.
Positive Terminal of Output Power Ramp Capacitor. Connect capacitor, C RAMP , between
RAMP+ and RAMP- to control the rise and fall time of the output power ramp.
Bias Circuitry Ground. Connect directly to low-inductance ground plane. If vias are used,
separate them from other GND pin vias.
Bias Circuitry Supply Voltage. Bypass with appropriate capacitors to GND.
Output Stage Ground. Provides additional thermal conduction, as well as a low-inductance
path to ground. Connect directly to low-inductance ground plane.
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