参数资料
型号: MAX2242EBC+T
厂商: Maxim Integrated
文件页数: 6/9页
文件大小: 0K
描述: IC PWR AMP 2.4GHZ-2.5GHZ UCSP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
系列: *
频率: 2.4GHz ~ 2.5GHz
增益: 28.5dB
RF 型: DSSS,ISM
电源电压: 2.7 V ~ 3.6 V
电流 - 电源: 300mA
测试频率: 2.45GHz
封装/外壳: 12-WFBGA,WLCSP
包装: 带卷 (TR)
2.4GHz to 2.5GHz
Linear Power Amplifier
Pin Description
PIN
A1
A2
A3
A4
B1
B2
B4
C1
C2
C3
C4
NAME
GND
V CC2
GND
V CC1
RF_OUT
PD_OUT
GND
BIAS
SHDN
V CCB
RF_IN
FUNCTION
3 rd Stage Ground. Refer to Application Information section for detailed PC-board layout information.
2 nd Stage Supply Voltage. Bypass to ground using configuration in the typical operating circuit.
3 rd Stage Ground. Refer to Application Information section for detailed PC-board layout information.
1 st Stage Supply Voltage. Bypass to ground using configuration in the typical operating circuit.
RF Output. Requires external matching.
Power Detector Output. This output is a DC voltage indicating the PA output power. Connect a
47k ? resistor to GND.
1 st Stage and Bias Control Circuit Ground
Bias Control. Connect one 8k ? resistor from BIAS to GND and one 8k ? resistor from BIAS to DAC
block to set the idle current.
Shutdown Input. Drive logic low to place the device in shutdown mode. Drive logic high for normal
operation.
Bias Circuit DC Supply Voltage. Bypass to ground using configuration in the typical operating
circuit.
RF Input. Requires external matching.
Detailed Description
The MAX2242 is a linear PA intended for 2.4GHz ISM-
band wireless LAN applications. The PA is fully charac-
terized in the 2.4GHz to 2.5GHz ISM band. The PA
consists of two driver stages and an output stage. The
the DAC voltage, as shown in the Typical Application
Circuit . Resistor values R1 and R2 are determined as
follows:
V MAX = 1.0 + (1.0 ? R1) / R2;
(I CC = 0, V DAC = V MAX ) (1)
MAX2242 also features an integrated power detector
and power shutdown control mode.
Dynamic Power Control
The MAX2242 is designed to provide optimum power-
added efficiency (PAE) in both high and low power
applications. For a +3.3V supply at high output power
level, the output power is typically +22.5dBm with an
I MAX = (1.0 ? 1867) ? (R1 + R2) / (R1 ? R2);
(I CC = I MAX = max value, V DAC = 0)
I DAC = (V DAC - 1.0) / R1
I MID = (1.0 ? 1867) / R2;
(V DAC = 1.0V or floating)
I CC = 1867 ? I BIAS
(2)
(3)
(4)
(5)
idle current of 280mA. At low output-power levels, the
DC current can be reduced by an external DAC to
increase PAE while still maintaining sufficient ACPR
performance. This is achieved by using external resis-
tors connected to the BIAS pin to set the bias currents
of the driver and output stages. The resistors are typi-
cally 8k ? . Typically, a DAC voltage of 1.0V will give a
280mA bias current. Increasing the DAC voltage will
decrease the idle current. Similarly, decreasing the
DAC voltage will increase the idle current.
The BIAS pin is maintained at a constant voltage of
1.0V, allowing the user to set the desired idle current
using only two off-chip 1% resistors: a shunt resistor,
R2, from BIAS to ground; and a series resistor, R1, to
where
V MAX = is the maximum DAC voltage
I MAX = is the maximum idle current
I MID = is the idle current with V DAC = 1.0V or not
connected
V DAC = is the DAC voltage
I DAC = is the DAC current
If no DAC is used and a constant idle current is
desired, use equation 4 to determine the resistor values
for a given total bias current. Only R2 is required.
6
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