参数资料
型号: MAX2306ETI+
厂商: Maxim Integrated
文件页数: 7/20页
文件大小: 0K
描述: IC VGA DEMODULATOR 28TQFN-EP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
功能: 解调器
LO 频率: 40MHz ~ 300MHz
RF 频率: 40MHz ~ 300MHz
P1dB: -9dBm
噪音数据: 6.36dB
电流 - 电源: 41.5mA
电源电压: 2.7 V
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(5x5)
包装: 管件
CDMA IF VGAs and I/Q Demodulators
with VCO and Synthesizer
Pin Description
MAX2306
1, 28
2, 3
4
PIN
MAX2308
1, 4
2, 3
MAX2309
1, 2
3
NAME
TANKL+,
TANKL-
N.C.
TANKH+,
TANKH-
BUFEN
MODE
FUNCTION
Differential Tank Input for Low-Frequency Oscillator
No Connection. Must be left open-circuit.
Differential Tank Input for High-Frequency Oscillator
LO Buffer Amplifier—active low
Mode Select. High selects CDMA mode; low selects FM mode.
Internal VCO Output. Depending on setting of BD bit, LOOUT is
4
LOOUT
either the VCO frequency (twice the IF frequency) or one-half the
VCO frequency (equal to the IF frequency).
5
6
7
8
9, 10
11
12, 13
14
15
16
17
18
19, 20
21
22
23, 24
5
6
7
8
9, 10
11
12, 13
14
15
16
17
18
19, 20
21
22
23, 24
5
6
7
8
9, 10
11
12, 13
14
15
16
17
18
19, 20
22
23, 24
V CC
GND
REF
SHDN
IOUT+,
IOUT-
LOCK
QOUT-,
QOUT+
CLK
EN
DATA
V CC
VGC
CDMA-,
CDMA+
FM+
FM-
STBY
BYP
+2.7V to +5.5V Supply
Ground
Reference Frequency Input
Shutdown Input—active low. Low powers down entire device,
including registers and serial interface.
Differential In-Phase Baseband Output, or FM signal output if FM_I
mode is selected.
Lock Output—open-collector pin. Logic high indicates phase-locked
condition.
Differential Quadrature-Phase Baseband Output. Disabled if FM_I
mode is selected.
Clock input of the 3-wire serial bus
Enable Input. When low, input shift register is enabled.
Data input of the 3-wire serial bus.
+2.7V to +5.5V Supply
VGA Gain Control Input. Control voltage range is 0.5V to 2.3V.
Differential CDMA Input. Active in CDMA mode.
Differential Positive Input. Active in FM mode.
Differential Negative Input for FM signal. Bypass to GND for
single-ended operation.
Standby Input—active low. Low powers down VGA and demodulator
while keeping VCO, PLL, and serial bus on.
Bypass Node. Must be capacitively decoupled (bypassed) to pin 17.
_______________________________________________________________________________________
7
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