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参数资料
| 型号： | MAX2354ETI+ |
| 厂商： | Maxim Integrated |
| 文件页数： | 8/27页 |
| 文件大小： | 0K |
| 描述： | IC LNA/MIXER CELLULAR 28TQFN-EP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 60 |
| 功能： | LNA/混频器 |
| 频率： | 869MHz ~ 894MHz |
| RF 型： | 手机 |
| 次要属性： | 0.9dB LNA 噪声系数 |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 包装： | 管件 |
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Quadruple-Mode PCS/Cellular/GPS LNA/Mixers
Pin Description
PIN
MAX2351
MAX2358
MAX2530
MAX2354 MAX2359 MAX2531 MAX2537
MAX2538
NAME
FUNCTION
1
2
3
4
1
—
3, 27
4
—
2
3
—
1
2
3
4
1
—
3
4
CLNA_OUT
PLNA_IN
GND
CLNA_IN
Cellular LNA Output. Internally matched to 50 ? including an
on-chip DC-blocking capacitor.
PCS LNA Input. Requires a DC-blocking capacitor that can be
used as part of the matching network.
Ground
Cellular LNA Input. Requires a DC-blocking capacitor that can
be used as part of the matching network.
Shutdown Logic Input. A logic low shuts off the device, except
5
5
5
5
5
SHDN
LO_OUT and PLL buffers, which are controlled by BUFFEN
and PLL pins, respectively.
6, 8
—
7
—
9
10, 20, 21
—
11
2, 6, 8
—
7
—
9
10, 20,
21, 25, 28
—
11
1, 4, 6, 8,
24
—
7
—
9
10, 20,
21, 27
—
11
—
6
7
8
9
—
10
11
2
6
7
8
9
25, 28
10
11
N.C./GND
GLNA_IN
G1
GLNA_OUT
G2
I.C.
GMIX_IN
MODE
Pin can be grounded or left open-circuit.
GPS LNA Input. Requires a DC-blocking capacitor, which can
be used as part of the matching network.
Operating Mode Logic Input. Sets device operating modes.
See Table 2 for details.
GPS LNA Output. Internally matched to 50 ? including an on-
chip DC-blocking capacitor.
Operating Mode Logic Input. Sets device operating modes.
See Table 2 for details.
Internally Connected. Do not make connections to this pin.
GPS Mixer Input. Requires a DC-blocking capacitor, which
can be used as an interstage coupling capacitor.
Operating Mode Logic Input. Sets device operating modes.
See Table 2 for details.
Bias Setting Pin. For nominal bias, connect a 20k ? resistor to
12
12
12
12
12
BIAS
ground. Adjust R BIAS to alter the linearity of the mixers and
LNAs.
Dual-Function Pin. LO buffer output port for driving an external
13
13
13
13
13
PLL
PLL synthesizer. A logic high (through a 10k ? resistor)
enables the PLL buffer. A logic low disables the PLL buffer.
Leave open if not used. If open, PLL is low.
14
15
14
15
14
15
14
15
14
15
LO_IN
BUFFEN
LO Input. Internally matched to 50 ? , including DC-blocking
capacitor.
LO Buffer Enable Logic Input. A logic high enables the
external LO buffer port. Floats low.
8
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX2354ETI+ | 功能描述:射频混合器 PCS/Cellular/GPS LNA/Mixers RoHS:否 制造商:NXP Semiconductors 频率范围: 转换损失——最大: 工作电源电压:6 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| MAX2354ETI+T | 功能描述:射频混合器 PCS/Cellular/GPS LNA/Mixers RoHS:否 制造商:NXP Semiconductors 频率范围: 转换损失——最大: 工作电源电压:6 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| MAX2354ETI-T | 功能描述:射频混合器 PCS/Cellular/GPS LNA/Mixers RoHS:否 制造商:NXP Semiconductors 频率范围: 转换损失——最大: 工作电源电压:6 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| MAX2358EGI | 功能描述:射频混合器 PCS/Cellular/GPS LNA/Mixers RoHS:否 制造商:NXP Semiconductors 频率范围: 转换损失——最大: 工作电源电压:6 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| MAX2358EGI-T | 功能描述:射频混合器 PCS/Cellular/GPS LNA/Mixers RoHS:否 制造商:NXP Semiconductors 频率范围: 转换损失——最大: 工作电源电压:6 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
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