参数资料
型号: MAX2370ETM+
厂商: Maxim Integrated
文件页数: 8/19页
文件大小: 0K
描述: IC TRANSMITTER QUAD 48TQFN-EP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 43
频率: 450MHz
调制或协议: CDMA2000
功率 - 输出: 10dBm
电流 - 传输: 134mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
电源电压: 2.7V ~ 3.3V
工作温度: -40°C ~ 85°C
封装/外壳: 48-WFQFN 裸露焊盘
包装: 管件
Complete 450MHz Quadrature Transmitter
Pin Description (continued)
PIN
40
41
42
44
45, 46, 48,
EP
NAME
RFCP
V CCRFCP
RFPLL
LO
GND
FUNCTION
High-Impedance RF Charge-Pump Output. Connect to the tune input of the RF VCO through the
RF PLL loop filter. Keep the connection from RFCP to the tune input as short as possible to
prevent spurious pickup.
Power Supply for the RF Charge Pump. This supply can be different from the system V CC . Bypass
to PC board ground with a minimum 0.1μF capacitor placed as close to the pin as possible. Do
not share capacitor ground vias with other ground connections.
RF PLL Input. This port drives the RF PLL. RFPLL is internally biased to typically V CC - 0.8V.
RF LO Input. LO is internally biased to typically V CC - 0.8V.
Ground Connection. Solder the exposed paddle (EP) evenly to the board ’ s ground plane for
proper operation.
Detailed Description
The MAX2370 complete quadrature transmitter accepts
differential I/Q baseband inputs with external common-
mode bias. A modulator upconverts the baseband
inputs to a 95MHz to 195MHz IF frequency. A gain-con-
trol voltage pin (GC) controls the gain of both the IF and
RF VGAs simultaneously to achieve the best current
consumption and linearity performance. The IF signal is
brought off-chip for filtering, then fed to a single side-
band upconverter followed by the RF VGA and PA dri-
ver. The RF upconverter requires an external VCO for
operation. The IF PLL, RF PLL, and operating mode can
be programmed by an SPI/QSPI/ MICROWIRE-compati-
ble 3-wire interface.
The following sections describe each block in the
Functional Diagram .
I/Q Modulator
Differential in-phase (I) and quadrature-phase (Q)
inputs are designed to be DC-coupled and biased with
the baseband output from a digital-to-analog converter
(DAC). The I and Q inputs need a typical DC bias of
V CC / 2 and a current-drive capability of 8μA. However,
common-mode voltages in the 1.35V to (V CC - 1.25V)
range are also acceptable. The I and Q input capaci-
tances are typically 0.6pF to ground on each pin. The
IF VCO output is fed into a divide-by-two quadrature
generator block to derive quadrature LO components
to drive the I/Q modulator. The output of the modulator
is fed into the IF VGA.
IF VCO
The IF VCO oscillates at twice the desired IF frequency.
The oscillation frequency is determined by external tank
components (see the IF Tank Design section). Typical
spurious performance for the IF VCO is shown in the
Typical Operating Characteristics .
IFLO Output Buffer
IFLO provides a buffered LO output when BUF_EN is 1.
The IFLO output frequency is equal to the IF VCO fre-
quency, and the typical output power is -12dBm. This
output is intended for applications where the receive IF
is the same frequency as the transmit IF.
IF/RF PLL
The IF/RF PLL uses a charge-pump output to drive exter-
nal loop filters. The loop filter is typically a passive sec-
ond-order lead-lag filter. Outside the filter ’ s bandwidth,
phase noise is determined by the tank components. The
two components that contribute most significantly to
phase noise are the inductor and varactor. Use high-Q
inductors and varactors to maximize equivalent parallel
resistance. The IF_TURBO_CHARGE, RCP_TURBO1,
and RCP_TURBO2 bits can be set to enable turbo mode.
Turbo mode provides maximum charge-pump current
during frequency acquisition. Turbo mode is disabled
after frequency acquisition is achieved. When turbo
mode is disabled, charge-pump current returns to the
programmed levels as set by the ICP and RCP bits in the
CONFIG register (Table 3).
IF VGA
The IF VGA allows the IF output level to be controlled by
a voltage applied to the GC pin. The 0.5V to 2.5V voltage
range on GC provides a gain-control range of > 70dB,
with 2.5V providing maximum gain. The differential IF
output ports are optimized for the 95MHz to 195MHz fre-
quency range. Do not allow V GC to exceed V CC - 0.2V
as this may cause oscillations at cold temperatures.
Single-Sideband Mixer and RF VGA
The RF transmit mixer uses a single-sideband architec-
ture to eliminate an off-chip RF filter. The RF VGA fol-
lows the single-sideband mixer and is controlled by the
same GC voltage as the IF VGA to provide optimum
8
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