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参数资料
| 型号： | MAX2530ETI+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 10/27页 |
| 文件大小： | 0K |
| 描述： | IC LNA/MIXER CELL/PCS/GPS 28TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 混频器数目： | 3 |
| 增益： | 16dB |
| 噪音数据： | 6.5dB |
| 电流 - 电源： | 32mA |
| 电源电压： | 2.7 V ~ 3.3 V |
| 包装： | 带卷 (TR) |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 供应商设备封装： | 28-TQFN-EP（5x5） |
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Quadruple-Mode PCS/Cellular/GPS LNA/Mixers
LNA linearity is required for cross-modulation suppres-
sion. Use HGLL mode when the transmitter is off and
cross-modulation is not a concern. The LNAs are
designed to minimize input VSWR when changing
modes. Use low-gain mode for receiving large signals
and when high sensitivity is not required. The cellular
band provides an additional gain mode (MG) for
improved IP3 margin in CDMA medium-level interfer-
ence condition.
Downconverters
The downconverters in these devices are double-
balanced mixers. The cellular and PCS mixers have
three gain modes: high linearity, low linearity, and low
gain. The cellular and PCS mixers can route the IF sig-
nal to either IF0 or IF1 port. IF_SEL = low routes the IF
signal to IF0 port; IF_SEL = high routes the IF signal to
IF1 port. The GPS mixer has only one mode, and it has
a dedicated IF port (Table 2). All mixer inputs include
on-chip matching networks to reduce the external com-
ponent count.
LO Generation
Table 3 shows the options for the LO generation. The
on-chip LO divider or multiplier allows triple-band oper-
ation with a single VCO. The MAX2351 and MAX2531
have an LO multiplier that doubles the cellular band
VCO for PCS band operation. Conversely, the
MAX2358, MAX2537, and MAX2538 include an LO
divider that divides the PCS VCO frequency down to
cellular frequency band. The GPS LO is generated by a
fractional frequency scaler, which enables a single
VCO for operation in all three bands. The MAX2530 is
designed for operation with a dual-band VCO.
The PLL buffer output is provided for phase-locked
loop operation. The PLL pin serves two functions: RF
output signal for phase-locked loop operation and logic
input to enable or disable this buffer. A logic high
applied to this pin enables the PLL buffer; a logic low
disables the buffer.
A buffered LO output is provided to drive a transmit
upconverter. It is controlled by the BUFFEN input. For
time-division duplex applications, the buffer is available
Applications Information
Cascaded LNA/Mixer Performance
The LNA and mixer design optimizes cascaded perfor-
mance in all gain and linearity modes. In high-gain/high-
linearity mode, both the LNA and mixer have low noise
figure, high gain, and high linearity. In this mode, the
LNA has extra-high linearity for superior cross-modula-
tion suppression. The high-gain/low-linearity mode is
used when the transmitter is off and cross-modulation is
not a concern. In the ultra-low-gain mode, the received
signal is strong enough that sensitivity is not the limiting
factor. This mode focuses on minimizing supply current.
Tables 4, 5, 6 summarize the cascaded performance.
LNAs
The LNA inputs require external matching networks to
optimize gain, linearity, noise figure, and return loss. A
simple LC match is sufficient as shown in the Typical
Application Circuit . The cellular and GPS LNA outputs
are internally matched. The PCS LNA output requires
an inductor pullup to V CC and a series capacitor as
external matching elements. Table 7, 8, 9 show the S-
parameters for each LNA. Tables 13, 14, 15 show LNA
noise parameters.
Mixers
All mixer inputs are internally matched. The GPS and
PCS mixer inputs require a DC-blocking capacitor; the
cellular mixer does not. All IF outputs must be induc-
tively pulled up to V CC . The inductive pullup may be
used as part of the matching network. Because the dif-
ferential IF output port is high impedance, a load resis-
tor is typically used to ease the matching and establish
the gain. A 3.3k ? resistor is recommended for IF0 and
IF1, and 8.2k ? for the GIF port. The equivalent parallel
RC impedance of the IF ports is typically 12.2k ? in par-
allel with 0.75pF. Tables 10, 11, 12 show S-parameters
for the mixer input points.
Table 1. Abbreviation for LNA and Mixer
Modes
to drive the transmitter even when the rest of the chip is
shut down. The port is internally AC-coupled, so a DC-
blocking capacitor is not required.
Bias Control
The bias control input (BIAS pin) controls the IC bias
current. Typically, connect a 20k ? resistor to ground for
normal operation. Smaller bias resistor values increase
the supply current and linearity.
ABBREVIATION
HGHL
HGLL
MG
LG
ULG
HL
LL
MODE
High gain/high linearity
High gain/low linearity
Midgain
Low gain
Ultra-low gain
High linearity
Low linearity
10
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相关代理商/技术参数 |
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|---|---|
| MAX2530EVKIT | 功能描述:射频开发工具 MAX2530 Eval Kit RoHS:否 制造商:Taiyo Yuden 产品:Wireless Modules 类型:Wireless Audio 工具用于评估:WYSAAVDX7 频率: 工作电源电压:3.4 V to 5.5 V |
| MAX2531EGI | 功能描述:射频混合器 Quad-Mode PCS/Cell GPS LNA/Mixers RoHS:否 制造商:NXP Semiconductors 频率范围: 转换损失——最大: 工作电源电压:6 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| MAX2531EGI-T | 功能描述:射频混合器 Quad-Mode PCS/Cell GPS LNA/Mixers RoHS:否 制造商:NXP Semiconductors 频率范围: 转换损失——最大: 工作电源电压:6 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| MAX2531ETI | 功能描述:射频混合器 Quad-Mode PCS/Cell GPS LNA/Mixers RoHS:否 制造商:NXP Semiconductors 频率范围: 转换损失——最大: 工作电源电压:6 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| MAX2531ETI+ | 功能描述:射频混合器 RoHS:否 制造商:NXP Semiconductors 频率范围: 转换损失——最大: 工作电源电压:6 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
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