参数资料
型号: MAX3110EENI+G36
厂商: Maxim Integrated Products
文件页数: 3/31页
文件大小: 0K
描述: IC UART SPI COMPAT 28-DIP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 14
特点: 收发器
通道数: 1,UART
规程: RS232,RS485
电源电压: 4.5 V ~ 5.5 V
带IrDA 编码器/解码器:
带故障启动位检测功能:
带CMOS:
安装类型: 通孔
封装/外壳: 28-DIP(0.300",7.62mm)
供应商设备封装: 28-PDIP
包装: 管件
产品目录页面: 1404 (CN2011-ZH PDF)
SPI/MICROWIRE-Compatible UART and ±15kV ESD-
Protected RS-232 Transceivers with Internal Capacitors
SPI Interface
The MAX3110E/MAX3111E are compatible with SPI,
QSPI (CPOL = 0, CPHA = 0), and MICROWIRE serial-
interface standards (Figure 2). The MAX3110E/
MAX3111E have a unique full-duplex-only architecture
that expects a 16-bit word for DIN and simultaneously
produces a 16-bit word for DOUT regardless of which
read/write register is used. The DIN stream is moni-
tored for its first two bits to tell the UART the type of
data transfer being executed (see the
Write
Configuration Register, Read Configuration Register,
Write Data Register, and Read Data Register sections).
DIN (MOSI) is latched on SCLK’s rising edge. DOUT
(MISO) should be read into the P on SCLK’s rising
edge. The first bit (bit 15) of DOUT transitions on CS’s
falling edge, and bits 14–0 transition on SCLK’s falling
edge. Figure 3 shows the detailed serial timing specifi-
cations for the synchronous SPI port.
Only 16-bit words are expected. If CS goes high in the
middle of a transmission (any time before the 16th bit),
the sequence is aborted (i.e., data does not get written
to individual registers). Most operations, such as the
clearing of internal registers, are executed only on CS’s
rising edge. Every time CS goes low, a new 16-bit
stream is expected. An example of using the Write
Configuration Register is shown in Figure 4.
Table 1 describes the bits located in the Write Config-
uration, Read Configuration, Write Data, and Read
Data Registers. This table also describes whether the
bit is a read or a write bit and the power-on reset state
(POR) of the bits. Figure 5 shows an example of parity
and word-length control.
CS
SCLK
(CPOL = 0, CPHA = 0)
(CPOL = 0, CPHA = 1)
(CPOL = 1, CPHA = 0)
(CPOL = 1, CPHA = 1)
COMPATIBLE
WITH MAX3110E/MAX3111E
NOT COMPATIBLE
WITH MAX3110E/MAX3111E
DIN
MSB
13
14
12
11
10
9
8
7
6
5
4
3
2
1
LSB
DOUT
MSB
13
14
12
11
10
9
8
7
6
5
4
3
2
1
LSB
Figure 2. Compatible CPOL and CPHA Timing Modes
CS
SCLK
DIN
DOUT
tCSO
tCSS
tCL
tDS
tDH
tDV
tCH
tDO
tTR
tCSH
tCS1
Figure 3. Detailed Serial Timing Specifications for the Synchronous SPI Port
Maxim Integrated
11
MAX3110E/MAX3111E
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MAX3110EEWI+T 功能描述:UART 接口集成电路 RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel
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