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| 型号： | MAX3284EAUT+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 6/10页 |
| 文件大小： | 0K |
| 描述： | IC RS485/422 RECEIVER SOT23-6 |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 接收器 |
| 驱动器/接收器数： | 0/1 |
| 规程： | RS422，RS485 |
| 电源电压： | 3 V ~ 5.5 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 |
| 供应商设备封装： | SOT-6 |
| 包装： | 带卷 (TR) |
Detailed Description
The MAX3280E/MAX3281E/MAX3283E/MAX3284E are
single, true fail-safe receivers designed to operate at
data rates up to 52Mbps. The fail-safe architecture guar-
antees a high output signal if both input terminals are
open or shorted together. See the
True Fail-Safe section.
This feature assures a stable and predictable output
logic state with any transmitter driving the line. These
receivers function with a 3.3V or 5V supply voltage and
feature excellent propagation delay times (15ns).
The MAX3280E is a single receiver available in a 5-pin
SOT23 package. The MAX3281E (EN, active high) and
MAX3283E (EN, active low) are single receivers that
also contain an enable pin. Both the MAX3281E and
MAX3283E are available in a 6-pin SOT23 package.
The MAX3284E is a single receiver that contains a VL
pin, which allows communication with low-level logic
included in digital FPGAs. The MAX3284E is available
in a 6-pin SOT23 package.
The MAX3284E’s low-level logic application allows
users to set the logic levels. A logic high level of 1.65V
will limit the maximum data rate to 20Mbps.
±15kV ESD Protection
ESD-protection structures are incorporated on the
receiver input pins to protect against ESD encountered
during handling and assembly. The MAX3280E/
MAX3281E/MAX3283E/MAX3284E receiver inputs (A,
B) have extra protection against static electricity found
in normal operation. Maxim’s engineers developed
state-of-the-art structures to protect these pins against
±15kV ESD without damage. After an ESD event, this
family of parts continues working without latchup.
ESD protection can be tested in several ways. The
receiver inputs are characterized for protection to the
following:
±15kV using the Human Body Model
±6kV using the Contact Discharge method specified
in IEC 1000-4-2 (formerly IEC 801-2)
±12kV using the Air-Gap Discharge method speci-
fied in IEC 1000-4-2 (formerly IEC 801-2)
ESD Test Conditions
ESD performance depends on a number of conditions.
Contact Maxim for a reliability report that documents
test setup, methodology, and results.
Human Body Model
Figure 3a shows the Human Body Model, and Figure
3b shows the current waveform it generates when dis-
charged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of inter-
est, which is then discharged into the device through a
1.5k
resistor.
IEC 1000-4-2
Since January 1996, all equipment manufactured
and/or sold in the European community has been
required to meet the stringent IEC 1000-4-2 specifica-
tion. The IEC 1000-4-2 standard covers ESD testing
and performance of finished equipment; it does not
specifically refer to integrated circuits. The
MAX3280E/MAX3281E/MAX3283E/MAX3284E help
5
Maxim Integrated
MAX3280E/MAX3281E/
MAX3283E/MAX3284E
±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23
RS-485/RS-422 True Fail-Safe Receivers
Pin Description
PIN
MAX3280E
MAX3281E
MAX3283E
MAX3284E
NAME
FUNCTION
1
VCC
Positive Supply: 3V
VCC
5.5V. Bypass with a 0.1F
capacitor to GND.
2
GND
Ground
3
RO
Receiver Output. RO will be high if (VA - VB)
-50mV. RO will
be low if (VA - VB)
-200mV.
4
B
Inverting Receiver Input
—
5
—
EN
Receiver Output Enable. Drive
EN low to enable RO. When
EN is high, RO is high impedance.
—
5
—
EN
Receiver Output Enable. Drive EN high to enable RO. When
EN is low, RO is high impedance.
—
5
VL
Low-Voltage Logic-Level Supply Voltage. VL is a user-defined
voltage, ranging from 1.65V to VCC. RO output high is pulled
up to VL. Bypass with a 0.1F capacitor to GND.
5
6
A
Noninverting Receiver Input
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