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参数资料
| 型号： | MAX3638ETM+ |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 800 MHz, OTHER CLOCK GENERATOR, QCC48 |
| 封装： | 7 X 7 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, TQFN-48 |
| 文件页数： | 22/22页 |
| 文件大小： | 2523K |
| 代理商： | MAX3638ETM+ |
Low-Jitter, Wide Frequency Range,
Programmable Clock Generator with 10 Outputs
MAX3638
9
Pin Description
PIN
NAME
FUNCTION
1
DM
LVCMOS/LVTTL Input. Three-level control for input divider M. See Table 3.
2
XIN
Crystal Oscillator Input
3
XOUT
Crystal Oscillator Output
4
VCC
Core Power Supply. Connect to +3.3V.
5
IN_SEL
LVCMOS/LVTTL Input. Three-level control for input mux. See Table 1.
6
PLL_BP
LVCMOS/LVTTL Input. Three-level control for PLL bypass mode. See Table 2.
7, 8
DF1, DF0
LVCMOS/LVTTL Inputs. Three-level controls for feedback divider F. See Table 4.
9
QC_CTRL
LVCMOS/LVTTL Input. Three-level control input for C-bank output interface. See Table 10.
10
VCCA
Power Supply for Internal Voltage-Controlled Oscillators (VCOs). See Figure 3.
11
RES
Reserved. Connect to GND for normal operation.
12
DP
LVCMOS/LVTTL Input. Three-level control for prescale divider P. See Table 7.
13, 14
DB1, DB0
LVCMOS/LVTTL Inputs. Three-level controls for output divider B. See Table 5.
15, 16
DA1, DA0
LVCMOS/LVTTL Inputs. Three-level controls for output divider A. See Table 5.
17, 18
DC1, DC0
LVCMOS/LVTTL Inputs. Three-level controls for output divider C. See Table 6.
19
QA_CTRL2
LVCMOS/LVTTL Input. Three-level control for QA[4:3] output interface. See Table 8.
20
VCCQCC
Power Supply for QCC Output. Connect to +3.3V.
21
QCC
C-Bank LVCMOS Clock Output
22, 23
QC, QC
C-Bank Differential Output. Configured as LVPECL or LVDS with the QC_CTRL pin.
24
VCCQC
Power Supply for C-Bank Differential Output. Connect to +3.3V.
25, 36
VCCQA
Power Supply for A-Bank Differential Outputs. Connect to +3.3V.
26, 27
QA4, QA4
A-Bank Differential Output. Configured as LVPECL or LVDS with the QA_CTRL2 pin.
28, 29
QA3, QA3
A-Bank Differential Output. Configured as LVPECL or LVDS with the QA_CTRL2 pin.
30, 31
QA2, QA2
A-Bank Differential Output. Configured as LVPECL or LVDS with the QA_CTRL1 pin.
32, 33
QA1, QA1
A-Bank Differential Output. Configured as LVPECL or LVDS with the QA_CTRL1 pin.
34, 35
QA0, QA0
A-Bank Differential Output. Configured as LVPECL or LVDS with the QA_CTRL1 pin.
37
VCCQB
Power Supply for B-Bank Differential Outputs. Connect to +3.3V.
38, 39
QB0, QB0
B-Bank Differential Output. Configured as LVPECL or LVDS with the QB_CTRL pin.
40, 41
QB1, QB1
B-Bank Differential Output. Configured as LVPECL or LVDS with the QB_CTRL pin.
42, 43
QB2, QB2
B-Bank Differential Output. Configured as LVPECL or LVDS with the QB_CTRL pin.
44
QA_CTRL1
LVCMOS/LVTTL Input. Three-level control for QA[2:0] output interface. See Table 8.
45
QB_CTRL
LVCMOS/LVTTL Input. Three-level control for B-bank output interface. See Table 9.
46, 47
DIN, DIN
Differential Clock Input. Operates up to 350MHz. This input can accept DC-coupled LVPECL sig-
nals, and is internally biased to accept AC-coupled LVDS, CML, and LVPECL signals.
48
CIN
LVCMOS Clock Input. Operates up to 160MHz.
—
EP
Exposed Pad. Connect to supply ground for proper electrical and thermal performance.
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相关代理商/技术参数 |
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| MAX3638ETM+T | 功能描述:时钟发生器及支持产品 Low Jitter Programmable RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MAX3638EVKIT+ | 功能描述:计时器和支持产品 Not Available From Mouser RoHS:否 制造商:Micrel 类型:Standard 封装 / 箱体:SOT-23 内部定时器数量:1 电源电压-最大:18 V 电源电压-最小:2.7 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装:Reel |
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| MAX3639ETM+T | 功能描述:时钟发生器及支持产品 Low Jitter Programmable RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
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