参数资料
型号: MAX3668EHJ+
厂商: Maxim Integrated
文件页数: 8/12页
文件大小: 0K
描述: IC LSR DRVR 622MBPS 3.63V 32TQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 360
类型: 激光二极管驱动器(光纤)
数据速率: 622Mbps
通道数: 1
电源电压: 3.14 V ~ 5.5 V
电流 - 电源: 38mA
电流 - 调制: 75mA
电流 - 偏置: 80mA
工作温度: -40°C ~ 85°C
封装/外壳: 32-TQFP
供应商设备封装: 32-TQFP(5x5)
包装: 托盘
安装类型: 表面贴装
产品目录页面: 1423 (CN2011-ZH PDF)
+3.3V, 622Mbps SDH/SONET
Laser Driver with Automatic Power Control
Programming the APC Loop
When the MAX3668’s APC feature is used, program the
average optical power by adjusting the APCSET resis-
tor. To select this resistor, determine the desired moni-
tor current to be maintained over temperature and life.
Refer to the Monitor Diode Current vs. APC Set Resistor
graph in the Typical Operating Characteristics and
select the value of R APCSET that corresponds to the
required current.
Interfacing with the Laser Diode
To minimize optical output aberrations due to the laser
parasitic inductance, an RC shunt network may be
used (see Typical Operating Circuit) . If R L represents
the laser diode resistance, the recommended total
resistance for R D + R L is 10 ? . Starting values for coaxi-
al lasers are R FILT = 20 ? and C FILT = 5pF. R FILT and
C FILT should be experimentally adjusted to optimize
the output waveform. A bypass capacitor should also
be placed as close to the laser anode as possible for
best performance.
Pattern-Dependent Jitter (PDJ)
When transmitting NRZ data with long strings of consec-
utive identical digits (CID), LF droop can contribute to
pattern-dependent jitter. To minimize this pattern-depen-
dent jitter, two external components must be properly
chosen: capacitor C APC , which dominates the APC loop
time constant; and AC-coupling capacitor C D .
To filter out noise effects and guarantee loop stability,
the recommended value for C APC is 0.1μF. This results
in an APC loop bandwidth of 20kHz. Consequently, the
pattern-dependent jitter associated with an APC loop
time constant can be ignored.
The time constant associated with the DC blocking
capacitor on I MOD will have an effect on PDJ. It is
important that this time constant produce minimum
droop for long consecutive bit streams.
Referring to Figure 4, the droop resulting from long time
periods without transitions can be represented by the
following equation:
If t 1 equals 80 consecutive unit intervals without a tran-
sition, the time constant associated with the DC block-
ing capacitor needs to be longer than:
τ AC ≥ R AC C D = 7.8 (80 bits) (1.6ns/bit) = 1.0μs
R FILT can be ignored for C FILT << C D , therefore the
estimated value of R AC is:
R AC = 20 ? ?? (R D + r LASER )
Assuming R D = 5 ? , and r LASER = 5 ? :
R AC = 6.7 ?
with C D = 1.0μF, τ AC = 6.7μs.
Input Termination Requirement
The MAX3668 data inputs are PECL-compatible.
However, it is not necessary to drive the MAX3668 with
a standard PECL signal. As long as the specified com-
mon-mode voltage and differential voltage swings are
met, the MAX3668 will operate properly.
Calculate Power Consumption
The total power dissipation of the MAX3668 can be esti-
mated by the following:
P = V CC × I CC + (V CC - V f ) × I BIAS
+ I MOD (V CC - 20 ? × I MOD / 2)
where I BIAS is the maximum bias current set by R BIAS-
MAX , I MOD is the modulation current, and V f is the typi-
cal laser forward voltage.
Applications Information
The following is an example of how to set up the
MAX3668.
Select Laser
A communication-grade laser should be selected for
622Mbps applications. Assume the laser output aver-
age power is P AVE = 0dBm, the minimum extinction
-t
(100% - DROOP) = e τ
AC coupling of I MOD results in a discharge level for τ
that is equal to P AVG . An overall droop of 6% relative to
P p-p equates to a 12% droop relative to P AVG . To
P p-p
P AVG
τ << τ AC
τ=∞
τ AC
DROOP
ensure a droop of less than 12% (6% relative to P p-p ),
this equation can be solved for τ as follows:
τ =
-t
ln (1 - 0.12)
= 7.8t
t 1
t
Figure 4. Droop
8
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