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| 型号： | MAX3740AETG+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 4/15页 |
| 文件大小： | 0K |
| 描述： | IC DRIVER SFP VCSEL 24-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 激光二极管驱动器 |
| 数据速率： | 3.2Gbps |
| 通道数： | 1 |
| 电源电压： | 2.97 V ~ 3.63 V |
| 电流 - 电源： | 55mA |
| 电流 - 调制： | 15mA |
| 电流 - 偏置： | 15mA |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 24-WFQFN 裸露焊盘 |
| 供应商设备封装： | 24-TQFN-EP（4x4） |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
3.2Gbps SFP VCSEL Driver with Diagnostic
Monitors
ELECTRICAL CHARACTERISTICS (continued)
(V CC = +2.97V to +3.63V, T A = -40 ° C to +85 ° C. Typical values are at V CC = +3.3V, TC1 and TC2 are shorted, PEAKSET open, T A =
+25 ° C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SAFETY FEATURES (see the Typical Operating Characteristics section)
High-Current Fault Threshold
V BIAS Fault Threshold
Power-Monitor Fault Threshold
V BMTH
V BTH
V PMTH
V BIASMON > V BMTH causes a fault
V BIAS referenced to V CC
V PWRMON > V PMTH causes a fault
0.7
-0.250
0.7
0.8
-0.2
0.8
0.9
-0.150
0.9
V
V
V
Time from rising edge of TX_DISABLE to
TX Disable Time
t_ OFF
I BIAS = I BIAS_OFF and I MOD = I MOD_OFF
1.8
5
μs
(Note 6)
Time from rising edge of TX_DISABLE to
TX Disable Negate Time
t_ ON
I BIAS and I MOD at 99% of steady state
55
500
μs
(Note 6)
Fault Reset Time
Power-On Time
t_ INIT 1
t_ INIT 2
Time to set V FAULT = low after power-on or
after rising edge of TX_DISABLE (Note 6)
Time after power-on to transmitter-on with
TX_DISABLE low (Note 6)
60
60
200
200
ms
ms
Time from fault occurrence to V FAULT =
Fault Assert Time
t_ FAULT
high; C FAULT < 20pF, R FAULT = 4.7k Ω
1.4
50
μs
(Note 6)
Fault Delay Time
TX_DISABLE Reset
t_ FLTDLY
t_ RESET
Time from fault to I BIAS = I BIAS_OFF and
I MOD = I MOD_OFF (Note 6)
Time TX_DISABLE must be held high to
reset FAULT (Note 6)
1
5
1
μs
μs
Note 1: Supply current measurements exclude I BIAS from the total current.
Note 2: Tested with R PEAK = 1.18k Ω .
Note 3: Measured by applying a pattern that contains 20μs of K28.5, followed by 5μs of zeros, then 20μs of K28.5, followed by 5μs
of ones. Data rate is equal to 2.5Gbps, with inputs filtered using 1.8GHz Bessel filters.
Note 4: V BIAS < V CC - 0.7V.
Note 5: Variation of bias monitor gain for any single part over the range of V CC , temperature, 3mA < I BIAS < 15mA.
Note 6: Guaranteed by design and characterization.
Note 7: Measured electrically with a 50 Ω load AC-coupled to OUT+.
Note 8: Deterministic jitter is the peak-to-peak deviation from the ideal time crossings measured with a K28.5 bit pattern at 3.2Gbps
(00111110101100000101).
4
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