参数资料
型号: MAX3750CEE+
厂商: Maxim Integrated Products
文件页数: 4/6页
文件大小: 0K
描述: IC PORT BYPASS 2.125GBPS 16-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 100
应用: 数据传输
电源电压: 3 V ~ 3.6 V
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-QSOP
包装: 管件
安装类型: 表面贴装
MAX3750/MAX3751
+3.3V, 2.125Gbps/1.0625Gbps
Fibre Channel Port Bypass ICs
4
_______________________________________________________________________________________
_________________Circuit Description
A simplified block diagram of the single port bypass is
shown in Figure 1. IN+ and IN- drive an input buffer
(INBUFF) with 150 of internal differential input termi-
nation. INBUFF drives an output buffer (LOBUFF) and
an input to a multiplexer (MUX).
A low TTL input at SEL selects the signal path of
INBUFF through MUX to the output buffer (OUTBUFF).
When SEL has a high TTL logic level present the signal
path is into LIBUFF, through MUX, to OUTBUFF.
Low-Frequency Cutoff
The low-frequency cutoff is determined by the input
resistance and the coupling capacitor as illustrated by
the following equation:
fC = 1 / (2πRC)
In a typical system where R = 150 and C = 100nF,
resulting in fC = 10kHz.
Layout Techniques
The MAX3750/MAX3751 are high-frequency products.
The performance of the circuit is largely dependent
upon layout of the circuit board. Use a multilayer circuit
board with dedicated ground and VCC planes. Power
supplies should be capacitively bypassed to the
ground plane with surface-mount capacitors placed
near the power-supply pins.
SEL
NOTE: SEE INTERNAL INPUT/OUTPUT SCHEMATICS FOR DETAILED TERMINATIONS (FIGURES 2–5).
INBUFF
LOBUFF
LIBUFF
IN+
IN-
MUX
D0
Q
SEL
TTLIN
D1
OUTBUFF
OUT+
OUT-
VCC
GND
LOUT+
LOUT-
LIN+
LIN-
MAX3750
MAX3751
Figure 1. MAX3750/MAX3751 Block Diagram
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