参数资料
型号: MAX3761EEP+T
厂商: Maxim Integrated Products
文件页数: 11/12页
文件大小: 0K
描述: IC AMP LIMITING 622MBPS 20-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 限幅放大器
应用: 光纤学网络
安装类型: 表面贴装
封装/外壳: 20-SSOP(0.154",3.90mm 宽)
供应商设备封装: 20-QSOP
包装: 带卷 (TR)
MAX3761/MAX3762
Capacitor Selection
A typical MAX3761/MAX3762 implementation requires
four external capacitors. To select the capacitors, first
determine the following parameters in the receiver sys-
tem (see the
Applications Information section for rec-
ommendations in 622Mbps ATM and Fibre Channel
1063Mbps systems):
1) The duration of the expected longest run of consec-
utive bits in the data stream. For example, 72 con-
secutive zeros in a 622Mbps data stream have a
duration of 116ns.
2) The maximum allowable data-dependent jitter.
3) The desired power-detector integration time con-
stant [1 / (2
πfINT)].
4) The transimpedance amplifier’s maximum peak-to-
peak output voltage.
Step 1. Select the Input AC-Coupling Capacitors (CIN).
When using a limiting preamplifier with a highpass
frequency response, select CIN to provide a low-
frequency cutoff (fC) one decade lower than the
preamplifier low-frequency cutoff. This causes nearly all
data-dependent jitter (DDJ) to be generated in the pre-
amplifer circuit. For example, if the preamplifier’s low-
frequency cutoff is 150kHz, then select CIN to provide a
15kHz low-frequency cutoff.
Select CIN with the following equation:
For differential input signals, use a capacitor equal to
CIN on both inputs (VIN+ and VIN-). For single-ended
input signals, one capacitor should be tied to VIN+ and
another should decouple VIN- to ground.
When using a preamplifier without a highpass
response, select CIN to ensure that data-dependent jit-
ter is acceptable. The following equation provides an
estimate for CIN:
where: tL = duration of the longest run of consecutive
bits with the same value (seconds); DDJ = maximum
allowable data-dependent jitter, peak-to-peak (seconds);
BW = typical system bandwidth, normally 0.6 to 1.0
times the data rate (hertz).
Regardless of which method is used to select CIN, the
maximum LOS assert time can be estimated from the
value of CIN. The following equation estimates LOS time
delay when the maximum-amplitude signal is instanta-
neously removed from the input, and when the FILTER
time constant is much faster than the input time con-
stant (CFILTER < 0.4CIN):
tLOS ASSERT = 1950CINln(VMAXp-p / VASSERTp-p)
where VMAXp-p is the maximum output of the preampli-
fier, and VASSERTp-p is the input amplitude that causes
LOS to assert. The equation describes the input capac-
itors’ discharge time, from maximum input to the LOS
threshold into the 1950
Ω, single-ended input resis-
tance.
Step 2. Select the Offset-Correction Capacitor (CAZ).
To maintain stability, it is important to keep a one-
decade separation between fC and the low-frequency
cutoff associated with the DC-offset-correction circuit
(fOC).
The input impedance between CZP and CZN is
approximately 800k
Ω in parallel with 10pF. As a result,
the low-frequency cutoff (fOC) associated with the DC-
offset-correction loop is computed as follows:
where CAZ is an optional external capacitor between
CZP and CZN.
If CIN is known, then:
Step 3. Select the Power-Detect Integration Capacitor
(CFILTER). For 622Mbps ATM applications, Maxim rec-
ommends a filter frequency of 3MHz, which requires
CFILTER = 100pF. The integration frequency can be
selected lower to remove low-frequency noise, or to
prevent unusual data sequences from asserting LOS.
CFILTER = 1 / ( 2
π500fINT)
where fINT is the integration frequency.
C
pF
AZ
IN
41
10
f=
1
2 800k
OC
πΩ CpF
AZ +
()
10
C
-
IN
L
()(
)
t
DDJ BW
1950
1
05
ln
.
C=
1
2 f 1950
IN
C
πΩ
Low-Power, 622Mbps Limiting Amplifiers
with Chatter-Free Power Detect for LANs
8
_______________________________________________________________________________________
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