参数资料
型号: MAX3890ECB+TD
厂商: Maxim Integrated Products
文件页数: 10/12页
文件大小: 0K
描述: IC 16:1 SERIALIZER 64-TQFP-EP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 750
功能: 串行器
数据速率: 2.5Gbps
输入类型: LVDS
输出类型: PECL
输入数: 16
输出数: 1
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-TQFP 裸露焊盘
供应商设备封装: 64-TQFP-EP(10x10)
包装: 带卷 (TR)
MAX3890
+3.3V, 2.5Gbps, SDH/SONET 16:1 Serializer
with Clock Synthesis and LVDS Inputs
_______________________________________________________________________________________
7
Low-Voltage Differential-Signal
Inputs and Outputs
The MAX3890 has LVDS inputs and outputs for inter-
facing with high-speed digital circuitry. The LVDS
standard is based on the IEEE 1596.3 LVDS specifi-
cation. This technology uses 250mV to 400mV differ-
ential low-voltage swings to achieve fast transition
times, minimized power dissipation, and noise immu-
nity.
For proper operation, the parallel clock LVDS outputs
(PCLKO+, PCLKO-) require 100
differential DC termi-
nation between the inverting and noninverting outputs.
Do not terminate these outputs to ground.
The parallel data and parallel clock LVDS inputs
(PDI_+, PDI_-, PCLKI+, PCLKI-, RCLK+, RCLK-) are
internally terminated with 100
differential input resis-
tance, and therefore do not require external termina-
tion.
PECL Outputs
The serial-data PECL outputs (SDO+, SDO-, SCLKO+,
SCLKO-) require 50
DC termination to (VCC - 2V) (see
the Alternative PECL-Output Termination section).
Current-Mode Logic Outputs
The system loopback outputs (SLBO+, SLBO-) of the
MAX3890 are designed using CML. The configuration
of the MAX3890 current-mode logic (CML) output cir-
cuit includes internal 50
back termination to VCC
(Figure 3). These outputs are intended to drive a 50
transmission line terminated with a matched load
impedance.
tSKEW
SERIAL
OUTPUT DATA
(SDO)
NOTE: SIGNALS SHOWN ARE DIFFERENTIAL. FOR EXAMPLE, PCLKO = (PCLKO+) - (PCLKO-).
*PDI 15 = D15; PDI14 = D14; ...PDI0 = D0.
THIS FIGURE IS NOT INTENDED TO SHOW A SPECIFIC TIMING RELATIONSHIP BETWEEN PARALLEL
INPUT DATA AND SERIAL OUTPUT DATA.
PARALLEL
INPUT DATA
(PDI_)
VALID PARALLEL DATA*
PCLKI
PCLKO
tSU
tH
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
D10
D11
D12
D13
D14
*D15
Figure 2. Timing Diagram
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MAX3891ECB+TD 功能描述:串行器/解串器 - Serdes Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64
MAX3891ECB-D 功能描述:串行器/解串器 - Serdes RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64