参数资料
型号: MAX3983UGK+D
厂商: Maxim Integrated Products
文件页数: 3/17页
文件大小: 0K
描述: IC SIGNAL COND QUAD 68-QFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 30
类型: 信号调节器
输入类型: CML
输出类型: CML
接口: LVTTL
电流 - 电源: 495mA
安装类型: 表面贴装
封装/外壳: 68-VFQFN 裸露焊盘
供应商设备封装: 68-QFN 裸露焊盘(10x10)
包装: 管件
产品目录页面: 1408 (CN2011-ZH PDF)
Detailed Description
The MAX3983 comprises a PC board receiver and
cable driver section (TX), as well as a cable receiver
and PC board driver section (RX). Equalization and sig-
nal detection are provided in each receiver, and pre-
emphasis is included in each transmitter. The MAX3983
includes separate enable control for the TX outputs and
RX outputs. Loopback is provided for diagnostic testing.
PC Board Receiver and Cable Driver
(TX_IN and TX_OUT)
Data is fed into the MAX3983 from the host through a
CML input stage and fixed equalization stage. The
fixed equalizer in the PC board receiver corrects for up
to 20in of PC board loss on FR4 material. The cable dri-
ver includes four-state preemphasis to compensate for
up to 20m of 24AWG, 100
Ω balanced cable. Table 1 is
provided for easy translation between preemphasis
expressions. Residual jitter of the MAX3983 is indepen-
dent of up to 0.17UIP-P source jitter.
Cable Receiver and PC Board Driver
(RX_IN and RX_OUT)
The fixed equalizer on each RX input provides approxi-
mately 6dB equalization to correct for up to 5m of
28AWG, 100
Ω balanced cable. The PC board driver
includes two-state preemphasis to compensate for up
to 20in of FR4 material.
Signal-Detect Outputs
Signal detect (SD) is provided on all eight data inputs.
Pullup resistors should be connected from the SD out-
puts to a supply in the 3.0V to 5.5V range. The signal-
detect outputs are not valid until power-up is complete.
Typical signal-detect response time is 0.35s.
In the RX section, the SD output asserts high when the
RX_IN signal amplitude is greater than 175mVP-P.
RX_SD deasserts low when the RX_IN signal amplitude
drops below 85mVP-P.
In the TX section, the SD output asserts high when the
TX_IN signal amplitude is greater than 800mVP-P.
TX_SD deasserts low when the TX_IN signal amplitude
drops below 200mVP-P.
TX and RX Enable
The TX_ENABLE and RX_ENABLE pins enable TX and
RX, respectively. Typical enable time is 15ns, and typi-
cal disable time is 25ns. The enable inputs may be
connected to signal-detect outputs to automatically
detect an incoming signal (see the
Autodetect section).
Power-On Reset
To limit inrush current, the MAX3983 includes internal
power-on reset circuitry. Connect a capacitor 0.1F ≤
CPOR ≤ 10F from POR to ground. With CPOR = 1F,
power-on delay is 6ms (typ).
MAX3983
Quad Copper-Cable Signal Conditioner
______________________________________________________________________________________
11
Table 1. Preemphasis Translation
RATIO
ααα
α
10Gbase-CX4
IN dB
1.41
0.17
0.29
3
2.00
0.33
0.50
6
2.82
0.48
0.65
9
4.00
0.60
0.75
12
V
HIGH PP
LOW PP
_
VV
HIGH PP
LOW PP
HIGH PP
LOW PP
__
+
1
_
V
LOW PP
HIGH PP
20 log
_
V
HIGH PP
LOW PP
VLOW_PP
VHIGH_PP
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