参数资料
型号: MAX4271ESA+T
厂商: Maxim Integrated
文件页数: 4/26页
文件大小: 0K
描述: IC CNTRLR HOT SWAP 8-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 热交换控制器
应用: 通用
内部开关:
电源电压: 2.7 V ~ 13.2 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
3V to 12V Current-Limiting Hot-Swap Controllers
with Autoretry, DualSpeed/BiLevel Fault Protection
ELECTRICAL CHARACTERISTICS (continued)
(V IN = +2.7V to +13.2V, T A = -40°C to +85°C, unless otherwise noted. Typical values are at V IN = +5V and T A = +25°C.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input can be driven to the absolute
Input Voltage Range
maximum limit without false output
-0.1
13.2
V
inversion
Input Bias Current
I B,COMP
0.001
1
μ A
ON Pulse Width Low (Note 7)
t RESTART
To unlatch a fault MAX4271, MAX4273 with
C TIM = IN
20
μ s
DIGITAL OUTPUTS (STAT, OUTC)
Output Leakage Current
V STAT ≤ 13.2, V OUTC ≤ 13.2
1
μ A
Output Voltage Low
V OL
I SINK = 1mA
0.4
V
RETRY TIMING (MAX4272, MAX4273)
Retry Timeout Period
Default Retry
Timeout Period
t RETRY
t RETRY
(default)
100nF capacitor on C TIM (Note 5)
C TIM = no connection
0.5
1
176
2
s
μs
UNDERVOLTAGE LOCKOUT (UVLO)
Threshold
Hysteresis
V UVLO
V UVLO,HYST
Startup is initiated when this threshold is
exceeded at IN
2.25
100
2.67
V
mV
Time the input voltage must exceed
Delay
t D,UVLO
undervoltage lockout before startup is
100
150
200
ms
initiated
Note 3: All devices are 100% tested at T A = +25°C. All temperature limits are guaranteed by design.
Note 4: Startup period is the time during which the slow comparator is ignored and the fast comparator regulates the sense current.
It is measured from the time ON is brought high.
Note 5: Inferred from test with C TON = 10nF (MAX4273) and C TIM = 1nF.
Note 6: The current available at GATE is a function of V GATE (see Typical Operating Characteristics ).
Note 7: Guaranteed by design.
4
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