参数资料
型号: MAX4399CTK+T
厂商: Maxim Integrated Products
文件页数: 28/33页
文件大小: 0K
描述: IC SW A/V SCART CON 68-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 开关
应用: 接收器,机顶盒,电视
安装类型: 表面贴装
封装/外壳: 68-TQFN 裸露焊盘
供应商设备封装: 68-TQFN-EP(10x10)
包装: 带卷 (TR)
MAX4399
Audio/Video Switch for Three SCART
Connectors
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VV12 = 12V, VV_VID = 5V, VV_DIG = 5V, 0.47F X5R capacitor in parallel with a 10F aluminum electrolytic capacitor from V_AUD to
G_AUD, no load, TA = 0°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input DC Level
Gain = 0dB
V_AUD/2
V
Input Signal Amplitude
Inferred through total harmonic distortion
specification, f = 1kHz
2VRMS
Input Resistance
100
k
Output DC Level
V_AUD/2
V
Signal-to-Noise Ratio
SNR
f = 1.0kHz, 1VRMS, gain = 0dB, 20Hz to
20kHz
105
dB
f = 1.0kHz, 0.5VRMS
0.002
Total Harmonic Distortion
THD
RLOAD = 10k
f = 1.0kHz, 2VRMS
0.005
%
Output Impedance
0.5
TV audio, volume control
range extends from -56dB
to +6dB
1.5
2
2.5
Volume Attenuation Step
1.414VP-P
input
VCR, AUX audio
5.5
6
6.5
dB
Power-Supply Rejection Ratio
PSRR
f = 1kHz, 0.5VP-P
110
dB
Mute Suppression
f = 1kHz, 0.5VRMS input
105
dB
Audio Limiter Level
f = 1kHz, 2.5VRMS input
6.7
VP-P
Crosstalk
f = 1kHz, 0.5VRMS, gain = 0dB
105
dB
DIGITAL INTERFACE: SDA and SCL
Low-Level Input Voltage
VIL
0.8
V
High-Level Input Voltage
VIH
2.6
V
Hysteresis of Schmitt Trigger
Input
0.2
V
ISINK = 3mA
0
0.4
SDA Low-Level Output Voltage
VOL
ISINK = 6mA
0
0.6
V
Output Fall Time for SDA Line
400pF bus load
250
ns
Spike Suppression
50
ns
Input Current
VIL = 0V, VIH = 5V
-10
+10
A
Input Capacitance
5pF
SCL Clock Frequency
0
400
kHz
Hold Time
tHD,STA
Repeated start condition
0.6
s
Low Period of SCL Clock
tLOW
1.3
s
High Period of SCL Clock
tHIGH
0.6
s
Setup Time for a Repeated Start
Condition
tSU,STA
0.6
s
Data Hold Time
tHD,DAT
0
0.9
s
Data Setup Time
tSU,DAT
100
ns
Maximum Receive SCL/SDA Rise
Time
tR
(Note 3)
300
ns
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