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参数资料
| 型号： | MAX459 |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | 运动控制电子 |
| 英文描述： | 8x4 Video Crosspoint Switches with Buffers(8*4,90MHz,带AV=2V/V输出缓冲器,交叉视频开关矩阵) |
| 中文描述： | 8-CHANNEL, CROSS POINT SWITCH |
| 文件页数： | 10/16页 |
| 文件大小： | 185K |
| 代理商： | MAX459 |
M
8x4 Video Crosspoint S witc hes with Buffers
10
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to their switch registers. As long as either –W—–or –—is
high, the input register will not change. The switch reg-
ister will pass any new data on the falling transition of
Each register of the switch-register bank controls the
registers are transparent and switch connection is con-
high, the switch register is latched and any change in
data by the input register will not affect the amplifier
output state. Two register banks are used so that data
can be loaded into input registers without affecting the
switch/amplifier selection. This allows amplifiers to be
programmed and then changed simultaneously. When
the registers are not latched, they are made transparent.
Use data bit D3 to disable the amplifier selected by
A0–A1 and place its output in high-impedance mode.
As an example, the code to disable OUT0 is as follows:
Pin Name: D3 D2 D1 D0 A1 A0
Input Code: 1 X X X 0 0
When operating in parallel mode, C—must be wired high
and SCLK and DIN should be grounded, as shown in
Figure 3. Refer to Figure 4 for the correct timing rela-
tionships.
Digital S ec tion—S erial Mode
The MAX458/MAX459 use a three-wire serial interface
that is compatible with SPI, QPSI and Microwire inter-
faces. Serial mode, shown in Figure 5, is enabled
low. Figures 6 and 7 show serial-mode timing. Figure 8
shows the MAX458/MAX459 configured for serial oper-
ation. Figure 9 shows the Microwire connection, and
Figure 10 shows the SPI/QSPI connection.
The serial output, DOUT, allows cascading of two or
more crosspoint switches to create larger arrays. The
data at DOUT is delayed by 16 cycles plus one clock
pulse width at DIN. DOUT changes on SCLK’s falling
in the state of the last data bit.
The MAX458/MAX459 input data in 16-bit blocks. SPI
and Microwire interfaces output data in 8-bit blocks,
thereby requiring two write cycles to input data. The
QSPI interface allows variable word lengths from 8 to 16
bits and can be loaded into the crosspoint in one write
cycle. SPI and Microwire limit clock rates to 2MHz, while
the QSPI maximum clock rate is 4MHz.
ADDRESS VALID
A0/A1
CE
WR
UPDATE
t
ADS
t
CES
t
WR
t
CEH
t
DS
t
ADH
DATA VALID
D0–D3
t
DH
t
WRS
t
UP
t
UPS
Figure 4. Parallel-Mode Timing
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