参数资料
型号: MAX4822ETP+T
厂商: Maxim Integrated Products
文件页数: 13/19页
文件大小: 0K
描述: IC RELAY DRIVER 8CHAN 20-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 继电器/灯驱动器
输入类型: 串行
输出数: 8
导通状态电阻: 2.7 欧姆
电流 - 输出 / 通道: 70mA
电流 - 峰值输出: 150mA
电源电压: 2.3 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-WFQFN 裸露焊盘
供应商设备封装: 20-TQFN-EP(4x4)
包装: 带卷 (TR)
+3.3V/+5V, 8-Channel Relay Drivers with Fast
Recovery Time and Power-Save Mode
connected to PSAVE. The value t PS is given by the fol-
lowing formula:
t PS = 32 x C
where C is in μF and t PS is in ms.
For example, if the desired t PS is 20ms, then the
required capacitor value is 20 / 32 = 0.625μF.
Power-Save Mode Accuracy
CS
SCLK
The current through the relay is controlled by setting
the voltage at OUT_ to a percentage of the V CC supply
DIN
D7
D6
D5
D4
D3
D2
D1
D0
as specified under the Electrical Characteristics and in
the register description. The current through the relay
(I OUT ) depends on the switch on-resistance, R ON, in
addition to the relay resistance R R according to the fol-
lowing relation:
I OUT = V CC / (R ON + R R )
Figure 6. 3-Wire Serial-Interface Operation for the MAX4823
CS
The power-save, current-setting I PS depends on the
fraction α of the supply voltage V CC that is set by the
loop depending on the following relation:
I PS = V CC - ( α x V CC ) / R R
A_
t AS
t AH
Therefore:
I PS / I OUT = (1- α ) x (1 + R ON / R R )
t LS
t LH
This relation shows how the fraction of reduction in the
current depends on the switch on-resistance, as well as
from the accuracy of the voltage setting ( α ). The higher
the R ON with respect to R R, the higher the inaccuracy.
This is particularly true at low voltage when the relay
resistance is low (less than 40 ? ) and the switch can
account for up to 10% of the total resistance. In addi-
tion, when the supply-voltage setting ( α ) is low (10% or
20%) and the supply voltage (V CC ) is low, the voltage
drop across the switch (I OUT x R ON ) may already
LVL
V OUT
Figure 7. Parallel-Interface Timing Diagram
t ON ,
t OFF
exceed, or may be very close to, the desired voltage-
setting value.
Daisy Chaining and Power-Save Mode
In a normal configuration using the power-save feature,
several MAX4822s can be daisy chained as shown in
Figure 9. For each MAX4822, the power-save timing
t PD (time it takes to reduce the relay current once the
relay is actuated) is controlled by the capacitor con-
nected to PSAVE.
An alternative configuration that eliminates the PSAVE
capacitors uses a common PSAVE control line driven by
an open-drain n-channel MOSFET (Figure 10). In this con-
figuration, the PSAVE inputs are connected together to
asynchronously control the power-save timing for all the
MAX4822s in the chain. The μC/μP drives the n-channel
MOSFET low for the duration of a write cycle to the SPI
chain, plus some delay time to allow the relays to close.
(This time is typically specified in the relay data sheet.)
Once this delay time has elapsed, the n-channel MOSFET
is turned off, allowing the MAX4822’s internal 35μA pullup
current to raise PSAVE to a logic-high level, activating the
power-save mode in all active outputs.
MOSFET Selection
In the daisy-chain configuration of Figure 10, the n-channel
MOSFET drives PSAVE low. When the n-channel
MOSFET is turned off, PSAVE is pulled high by an internal
35μA pullup in each MAX4822, and the power-save mode
is enabled. Because of the paralleled PSAVE pullup
currents, the required size of the n-channel MOSFET
depends upon the number of MAX4822 devices in the
chain. Determine the size of the n-channel MOSFET by the
following relation:
R ON < 1428 / N
______________________________________________________________________________________
13
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