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参数资料
| 型号： | MAX4824ETP+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 4/19页 |
| 文件大小： | 0K |
| 描述： | IC 8CH RELAY DVR PWR SAVE 20TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 继电器/灯驱动器 |
| 输入类型： | 并联 |
| 输出数： | 8 |
| 导通状态电阻： | 2.7 欧姆 |
| 电流 - 输出 / 通道： | 70mA |
| 电流 - 峰值输出： | 150mA |
| 电源电压： | 2.3 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-WFQFN 裸露焊盘 |
| 供应商设备封装： | 20-TQFN-EP（4x4） |
| 包装： | 带卷 (TR) |
+3.3V/+5V, 8-Channel Relay Drivers with Fast
Recovery Time and Power-Save Mode
ELECTRICAL CHARACTERISTICS (continued)
(V CC = +2.7V to +5.5V, T A = -40°C to +85°C, unless otherwise noted. Typical values are at V CC = 2.7V, T A = +25°C, unless otherwise
noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Data Hold Time
t DH
0
ns
SCLK Fall to DOUT Valid
Rise Time (DIN, SCLK, CS , SET ,
RESET )
Fall Time (DIN, SCLK, CS ,
RESET , SET )
RESET Minimum Pulse Width
SET Minimum Pulse Width
CS Minimum Pulse Width
t DO
t SCR
t SCF
t RW
t SW
t CSW
50% of SCLK to (V IH , V IL of D IN ),
C L = 50pF
20% of V CC to 70% of V CC , C L = 50pF
(Note 6)
20% of V CC to 70% of V CC , C L = 50pF
(Note 6)
70
70
40
17
28
2
2
ns
μs
μs
ns
ns
ns
PARALLEL TIMING (MAX4824/MAX4825)
Turn-On Time
Turn-Off Time
LVL Setup Time
LVL Hold Time
Address to CS Setup Time
Address to CS Hold Time
Rise Time (A2, A1, A0, LVL)
Fall Time (A2, A1, A0, LVL)
RESET Pulse Width
SET Pulse Width
CS Minimum Pulse Width
t ON
t OFF
t LS
t LH
t AS
t AH
t SCR
t SCF
t RW
t SW
t CSW
From rising edge of CS , R L = 50 ? ,
C L = 50pF
From rising edge of CS , R L = 50 ? ,
C L = 50pF
20% of V CC to 70% of V CC , C L = 50pF
(Note 6)
20% of V CC to 70% of V CC , C L = 50pF
(Note 6)
20
0
20
0
70
70
40
1
3
2
2
μs
μs
ns
ns
ns
ns
μs
μs
ns
ns
ns
POWER-SAVE TIMING (MAX4822/MAX4824)
Power-Save Delay Time
Minimum PSAVE Low Time to
Power-Save Reset
t PS
t PSR
Variation from typical value, C L = 100nF
(Note 7)
1.6
3.2
2
5.4
3.5
ms
ms
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Specifications at -40°C are guaranteed by design and not production tested.
Thermal shutdown disables power save from all channels to reduce power dissipation inside the device.
Thermal shutdown turns off all channels.
The circuit can set the output voltage in power-save mode only if I OUT x R ON < V OUTP .
After relay turn-off, inductive kickback can momentarily cause the OUT_ voltage to exceed V CC . This is considered part of
normal operation and does not damage the device.
Note 6: Guaranteed by design.
Note 7: For other capacitance values, use the equation t PS = 32 x C.
4
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