参数资料
型号: MAX4925ELT+T
厂商: Maxim Integrated Products
文件页数: 1/7页
文件大小: 0K
描述: IC CTLR OVP W/EXT PFET 6UDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
类型: 过压保护控制器
应用: 手机,数码相机,媒体播放器
安装类型: 表面贴装
封装/外壳: 6-WFDFN
供应商设备封装: 6-uDFN(1.5x1.0)
包装: 标准包装
其它名称: MAX4925ELT+TDKR
General Description
The MAX4923–MAX4926 overvoltage protection
(OVP) controllers protect low-voltage systems against
high-voltage faults of up to +28V with an appropriate
external pFET. When the input voltage exceeds the over-
voltage lockout (OVLO) threshold, or falls below the
undervoltage lockout (UVLO) threshold, these devices
turn off the pFET to prevent damage to protected compo-
nents and issue a flag to notify the processor of a fault
condition.
The typical overvoltage trip level is set to 7.18V
(MAX4923), 6.16V (MAX4924), 5.65V (MAX4925), and
4.46V (MAX4926). The undervoltage trip level is set to
2.44V (typ) for all devices.
The input (IN) is ESD protected to ±15kV HBM when
bypassed to ground with a 1F ceramic capacitor. All
devices are offered in a small, 6-pin (1.5mm x 1.0mm)
DFN package and are specified over the extended
-40°C to +85°C temperature range.
Applications
Cell Phones
Digital Still Cameras
PDAs and Palmtop Devices
MP3 Players
Features
o Overvoltage Protection Up to +28V
o Preset 7.18V, 6.16V, 5.65V, and 4.46V Typical
Overvoltage Trip Levels
o Preset 2.44V Typical Undervoltage Trip Level
o ±2.5% Accurate Overvoltage/Undervoltage
Trip Levels
o Low 13A (typ) Supply Current
o Drives External pFET
o 20ms Adapter Debounce Time
o Fault Flag Indicator
o 6-Pin (1.5mm x 1.0mm) DFN Package
MAX4923–MAX4926
Overvoltage Protectors with
External pFET
________________________________________________________________
Maxim Integrated Products
1
MAX4923–MAX4926
OUTPUT
VIO
GATE
FLAG
GND
IN
1
μF
4
3
1
2
INPUT
+1.8V TO 28V
P
Typical Operating Circuit
19-0810; Rev 0; 4/07
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Ordering Information/Selector Guide
PART
PIN-PACKAGE
OVLO (V)
UVLO (V)
TOP MARK
PKG CODE
MAX4923ELT+*
6 μDFN
7.18
2.44
LB
L611-1
MAX4924ELT+
6 μDFN
6.16
2.44
LC
L611-1
MAX4925ELT+
6 μDFN
5.65
2.44
LD
L611-1
MAX4926ELT+
6 μDFN
4.46
2.44
LE
L611-1
Note: All devices are specified over the -40°C to +85°C operating temperature range.
+
Denotes lead-free package.
*
Future Product—contact factory for availability.
Pin Configuration
12
3
65
4
N.C
GATE
N.C
IN
FLAG
GND
MA4923MAX4926
μDFN
TOP VIEW
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