参数资料
型号: MAX5007BCUB+
厂商: Maxim Integrated Products
文件页数: 6/13页
文件大小: 0K
描述: IC REG USB LDO 150MA 10-UMAX
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
应用: 转换器,USB
输入电压: 4 V ~ 5.5 V
输出数: 1
输出电压: 3.3V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
供应商设备封装: 10-µMAX
包装: 管件
150mA USB LDO Regulators with ±15kV TVS
and μP Reset
Pin Description
PIN
1
2
3, 9
4
5
6
NAME
IN
D+
GND
D-
SELR
ENR
RESET
DESCRIPTION
Regulator Input. Supply voltage ranges from +4.0V to +5.5V. Bypass with a 1 μ F ceramic capacitor
to ground.
D+ ESD/Transient Suppression Input. Connect directly to USB port D+ data input. SELR high and
ENR low connects D+ to OUT through a 1.5k ? resistor.
Ground. This pin also functions as a heatsink. Solder to large pads or the circuit board ground
plane to maximize thermal dissipation.
D- ESD/Transient Suppression Input. Connect directly to USB port D- data input. SELR low and
ENR low connects D- to OUT through a 1.5k ? resistor.
USB Full-Speed/Low-Speed Termination Resistor Select. Logic high connects the termination
resistor to D+ for full-speed peripherals. Logic low connects the termination resistor to D- for low-
speed peripherals. An internal 1.5k ? resistor connects to OUT when ENR is low.
USB Termination Resistor Enable. When reset is not asserted, ENR low enables the termination
resistor connection. ENR high or a reset disables the termination resistor connection.
Active-Low Reset Output. RESET remains low while V OUT is below the reset threshold or while MR
is held low. RESET remains low for the duration of the reset timeout period after the reset conditions
are terminated. (MAX5005/MAX5006 ONLY)
7
Active-High Reset Output. RESET remains high while V OUT is below the reset threshold or while MR
RESET
is held low. RESET remains high for the duration of the reset timeout period after the reset
conditions are terminated. (MAX5007 ONLY)
Active-Low Manual Reset Input. A logic low forces a reset. Reset remains asserted for the duration
8
10
MR
OUT
of the reset timeout period after MR transitions from low to high. Leave unconnected or connect to
OUT if not used. MR has an internal pullup resistor of 25k ? to OUT.
Voltage Regulator Output. Fixed +3.3V. Sources up to 150mA. Bypass with a 1 μ F (min) capacitor
for full rated performance.
6
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