参数资料
型号: MAX5024SASA+T
厂商: Maxim Integrated
文件页数: 3/13页
文件大小: 0K
描述: IC REG LDO 3.3V/ADJ .15A 8-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
稳压器拓扑结构: 正,固定式或可调式
输出电压: 3.3V,2.5 V ~ 11 V
输入电压: 6.5 V ~ 65 V
电压 - 压降(标准): 0.9V @ 150mA
稳压器数量: 1
电流 - 输出: 150mA(最小)
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
65V, Low-Quiescent-Current, High-Voltage Linear
Regulators with μP Reset and Watchdog Timer
ELECTRICAL CHARACTERISTICS (continued)
(V IN = +14V, I OUT = 1mA, C IN = 10μF, C OUT = 15μF, V EN = +2.4V, HOLD = open, 10k ? from RESET to OUT, T A = -40°C to +125°C,
unless otherwise noted. Typical specifications are at T A = +25°C.) (Note 1)
PARAMETER
Load Regulation
Power-Supply Rejection Ratio
Short-Circuit Current
SYMBOL
? V OUT /
? I OUT
PSRR
I SC
CONDITIONS
I OUT = 1mA to 150mA
I OUT = 10mA, f = 100Hz, 500mV P-P ,
V OUT = +5V
V IN = +8V
MIN
175
TYP
1
54
300
MAX
UNITS
mV/mA
dB
mA
Thermal-Shutdown
Temperature
Thermal-Shutdown Hysteresis
T J(SHDN)
? T J(SHDN)
150
20
°C
°C
RESET CIRCUIT
MAX502_L, SET = GND
MAX502_M, SET = GND
MAX502_T, SET = GND
4.50
4.25
2.970
4.625
4.375
3.052
4.75
4.50
3.135
Reset Threshold
V TH
MAX502_S, SET = GND
MAX5024L/T, SET = Divider
2.805
2.887
0.925 x
2.970
V
(Figure 1) (Note 3)
MAX5024M/S, SET = Divider
(Figure 1) (Note 3)
V OUT
0.875 x
V OUT
Reset Timeout Period
V OUT to Reset Delay
t RP
t RD
V OUT falling
140
200
5
260
ms
μs
V OUT ≥ +1.0V, I SINK = 50μA,
RESET asserted
0.3
Open-Drain RESET Output
Voltage (Note 4)
V OL
V OUT ≥ +2.85V, I SINK = 1.2mA,
RESET asserted
0.3
V
V OUT ≥ +4.25V, I SINK = 3.2mA,
RESET asserted
0.4
Open-Drain RESET Output-
Leakage Current
I LKG
RESET not asserted, V RESET = +11V
1.0
μA
WATCHDOG FUNCTION
Watchdog Timeout Period
WDI Pulse Width
WDI Input Voltage
t WD
t WDI
V IL
V IH
(Note 5)
1.12
50
2.4
1.6
2.08
0.4
s
ns
V
WDI Input Current
I WDI
WDI = GND
-1
+1
μA
Note 1: Limits at -40°C are guaranteed by characterization and not production tested.
Note 2: Dropout voltage is defined as V IN - V OUT when V OUT is 100mV below the value of V OUT for V IN = V OUT + 3V.
Note 3: V OUT = V SET (1 + R1 / R2) = 1.248V (1 + R1 / R2).
Note 4: RESET is guaranteed to be in the correct logic state for V OUT > +1V.
Note 5: Guaranteed by design, not production tested.
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