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| 型号： | MAX5033DASA+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 11/17页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 0.5A 8SOIC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1.25 V ~ 13.2 V |
| 输入电压： | 7.5 V ~ 76 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 125kHz |
| 电流 - 输出： | 500mA |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 8-SOIC |
MAX5033
500mA, 76V, High-Efficiency, MAXPower
Step-Down DC-DC Converter
Ensure that the ripple specification of the input capaci-
tor exceeds the worst-case capacitor RMS ripple cur-
capacitance and the ESR required for a specified rip-
ple using the following equations:
rent. Use the following equations to calculate the input
capacitor RMS current:
I CRMS = I PRMS 2 ? I AVGIN 2
ESR OUT =
? V OESR
? I L
( I PK DC 2 + ( I PK DC ) ) × D 3
? I L
where :
I PRMS =
2 + I × I
C OUT ≈
2 . 2 × ? V OQ × f SW
The MAX5033 has an internal soft-start time (t SS ) of
, I DC OUT ?
? I L ? I L
I PK = I OUT + = I
I AVGIN =
V O UT × I OUT
V IN × η
2 2
400μs. It is important to keep the output rise time at
startup below t SS to avoid output overshoot. The output
rise time is directly proportional to the output capacitor.
Use 68μF or lower capacitance at the output to control
the overshoot below 5%.
and D =
V OUT
V IN
In a dynamic load application, the allowable deviation
of the output voltage during the fast-transient load dic-
tates the output capacitance value and the ESR. The
I PRMS is the input switch RMS current, I AVGIN is the
input average current, and η is the converter efficiency.
The ESR of aluminum electrolytic capacitors increases
significantly at cold temperatures. Use a 1μF or greater
value ceramic capacitor in parallel with the aluminum
electrolytic input capacitor, especially for input voltages
below 8V.
Output Filter Capacitor
The worst-case peak-to-peak and RMS capacitor ripple
current, allowable peak-to-peak output ripple voltage,
and the maximum deviation of the output voltage dur-
ing load steps determine the capacitance and the ESR
requirements for the output capacitors.
output capacitors supply the step load current until the
controller responds with a greater duty cycle. The
response time (t RESPONSE ) depends on the closed-
loop bandwidth of the converter. The resistive drop
across the capacitor ESR and capacitor discharge
cause a voltage droop during a step load. Use a com-
bination of low-ESR tantalum and ceramic capacitors
for better transient load and ripple/noise performance.
Keep the maximum output-voltage deviation above the
tolerable limits of the electronics being powered.
Assuming a 50% contribution from the output capaci-
tance discharge and the ESR drop, use the following
equations to calculate the required ESR and capaci-
tance value:
The output capacitance and its ESR form a zero, which
improves the closed-loop stability of the buck regulator.
Choose the output capacitor so the ESR zero frequency
(f Z ) occurs between 20kHz to 40kHz. Use the following
ESR OUT =
? V OESR
I STEP
C OUT = STEP RESPONSE
equation to verify the value of f Z . Capacitors with 100m?
to 250m ? ESR are recommended to ensure the closed-
loop stability while keeping the output ripple low.
I × t
? V OQ
f Z =
1
2 × π × C OUT × ESR OUT
where I STEP is the load step and t RESPONSE is the
response time of the controller. Controller response
time is approximately one-third of the reciprocal of the
The output ripple is comprised of ? V OQ (caused by the
capacitor discharge) and ? V OESR (caused by the ESR
of the capacitor). Use low-ESR tantalum or aluminum
electrolytic capacitors at the output. Assuming that the
contributions from the ESR and capacitor discharge
equal 80% and 20%, respectively, calculate the output
Maxim Integrated
closed-loop unity-gain bandwidth, 20kHz (typ).
PCB Layout Considerations
Proper PCB layout is essential. Minimize ground noise
by connecting the anode of the Schottky rectifier, the
input bypass-capacitor ground lead, and the output fil-
ter-capacitor ground lead to a single point (star-
11
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