参数资料
型号: MAX5038EAI33+T
厂商: Maxim Integrated Products
文件页数: 23/26页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 28-SSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,000
PWM 型: 电流模式
输出数: 1
频率 - 最大: 1MHz
占空比: 90%
电源电压: 4.75 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
包装: 带卷 (TR)
Dual-Phase, Parallelable, Average Current-Mode
Controllers
PD MOS ? LO = ( Q G × V DD × f SW ) +
Input Capacitors
The discontinuous input-current waveform of the buck
??
?
?? + 1 . 4 R DS ( ON ) × I RMS ? LO
? 2 × C
?
OSS × V IN 2 × f SW
3
?
2
(18)
converter causes large ripple currents in the input
capacitor. The switching frequency, peak inductor cur-
rent, and the allowable peak-to-peak voltage ripple
reflected back to the source dictate the capacitance
( I )
DC + I PK + I DC × I PK ×
I RMS ? LO =
2 2
( 1 ? D )
3
(19)
requirement. Increasing the number of phases increas-
es the effective switching frequency and lowers the
peak-to-average current ratio, yielding lower input
capacitance requirement.
For example, from the typical specifications in the
Applications Information section with V OUT = +1.8V, the
high-side and low-side MOSFET RMS currents are 9.9A
and 24.1A, respectively. Ensure that the thermal imped-
ance of the MOSFET package keeps the junction tem-
perature at least 25°C below the absolute maximum
rating. Use the following equation to calculate maxi-
mum junction temperature:
The input ripple is comprised of ? V Q (caused by the
capacitor discharge) and ? V ESR (caused by the ESR of
the capacitor). Use low-ESR ceramic capacitors with
high ripple-current capability at the input. Assume the
contributions from the ESR and capacitor discharge are
equal to 30% and 70%, respectively. Calculate the
input capacitance and ESR required for a specified rip-
ple using the following equation:
? I OUT ? I L ?
? N
2 ?
T J = PD MOS x θ J-A + T A
(20)
ESR IN =
( ? V ESR )
? + ?
(21)
× D ( 1 ? D )
Table 3. Peak-to-Peak Output Ripple
Current Calculations
C IN =
I OUT
N
? V Q × f SW
(22)
? I = O
NUMBER OF
PHASES (N)
2
DUTY
CYCLE (D)
< 50%
EQUATION FOR ? I P-P
V (1 ? 2D)
L × f SW
where I OUT is the total output current of the multiphase
converter and N is the number of phases.
For example, at V OUT = +1.8V, the ESR and input
capacitance are calculated for the input peak-to-peak
ripple of 100mV or less yielding an ESR and capaci-
tance value of 1m ? and 200μF.
2
> 50%
? I =
( V IN ? V O )( 2D ? 1 )
L × f SW
Output Capacitors
The worst-case peak-to-peak and capacitor RMS ripple
current, the allowable peak-to-peak output ripple volt-
? I = O
? I = O
? I = O
4
4
4
0 to 25%
25% to 50%
> 50%
V (1 ? 4D)
L × f SW
V (1 ? 2D)(4D ? 1)
2 × D × L × f SW
V (2D ? 1)(3 ? 4D)
D × L × f SW
age, and the maximum deviation of the output voltage
during step loads determine the capacitance and the
ESR requirements for the output capacitors.
In multiphase converter design, the ripple currents from
the individual phases cancel each other and lower the
ripple current. The degree of ripple cancellation
depends on the operating duty cycle and the number of
phases. Choose the right equation from Table 3 to calcu-
late the peak-to-peak output ripple for a given duty
cycle of two-, four-, and six-phase converters. The max-
imum ripple cancellation occurs when N PH = K / D.
? I = O
6
< 17%
V (1 ? 6D)
L × f SW
______________________________________________________________________________________
23
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