参数资料
型号: MAX5054AATA/V+T
厂商: Maxim Integrated
文件页数: 10/15页
文件大小: 0K
描述: IC MOSFET DVR 4A 20NS DL 8-TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
配置: 低端
输入类型: 差分
延迟时间: 20ns
电流 - 峰: 4A
配置数: 2
输出数: 2
电源电压: 4 V ~ 15 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-WDFN 裸露焊盘
供应商设备封装: 8-TDFN-EP(3x3)
包装: 带卷 (TR)
4A, 20ns, Dual MOSFET Drivers
Table 1. MAX5054 Truth Table
INA+/INB+
Low
Low
INA-/INB-
Low
High
OUTA/OUTB
Low
Low
V DD
MAX5054A
High
Low
High
PWM
INPUT
INA+
OUTA
High
High
Low
Table 2. MAX5055/MAX5056/MAX5057
Truth Table
ON
OFF
INA-
GND
NONINVERTING
IN_+
Low
OUT_
Low
Figure 4. Unused Input as an ON/OFF Function (1/2 MAX5054A)
Applications Information
High
IN_-
Low
INVERTING
High
OUT_
High
RLC Series Circuit
The driver’s R DS(ON) (R ON ), internal bond and lead
inductance (L P ), trace inductance (L S ), gate inductance
(L G ), and gate capacitance (C G ) form a series RLC
High Low
The logic inputs are high impedance and must not be left
circuit with a second-order characteristic equation. The
series RLC circuit has an undamped natural frequency
( ? 0 ) and a damping ratio ( ζ ) where:
floating. If the inputs are left open, OUT_ can go to an
undefined state as soon as V DD rises above the UVLO
threshold. Therefore, the PWM output from the controller
must assume proper state when powering up the device.
? 0 =
1
( L P + L S + L G ) × C G
ξ =
( L P + L S + L G )
The MAX5054 has two logic inputs per driver providing
greater flexibility in controlling the MOSFET. Use IN_+ for
noninverting logic and IN_- for inverting logic operation.
Connect IN_+ to V DD and IN_- to GND if not used.
Alternatively, the unused input can be used as an
ON/OFF function. Use IN_+ for active-low shutdown logic
and IN_- for active-high shutdown logic (see Figure 4).
See Table 1 for all possible input combinations.
Driver Output
The MAX5054–MAX5057 have low R DS(ON) p-channel
and n-channel devices (totem pole) in the output stage
R ON
2 ×
C G
The damping ratio needs to be greater than 0.5 (ideally 1)
to avoid ringing. Add a small resistor (R GATE ) in series
with the gate when driving a very low gate-charge
MOSFET, or when the driver is placed away from the
MOSFET. Use the following equation to calculate the
series resistor:
for the fast turn-on and turn-off high gate-charge switch-
ing MOSFETs. The peak source or sink current is typically
4A. The OUT_ voltage is approximately equal to V DD
when in high state and is ground when in low state. The
R GATE ≥
(L P + L S + L G )
C G
? R ON
driver R DS(ON) is lower at higher V DD , thus higher
source-/sink-current capability and faster switching
speeds. The propagation delays from the noninverting
and inverting logic inputs to outputs are matched to 2ns.
The break-before-make logic avoids any cross-conduc-
tion between the internal p- and n-channel devices, and
eliminates shoot-through currents reducing the quiescent
supply current.
L P can be approximated as 3nH and 2nH for SO and
TDFN packages, respectively. L S is on the order of
20nH/in. Verify L G with the MOSFET vendor.
10
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