参数资料
型号: MAX5072ETJ+
厂商: Maxim Integrated Products
文件页数: 11/27页
文件大小: 0K
描述: IC REG BUCK BST ADJ 1A/2A 32TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
类型: 降压(降压),升压(升压)
输出类型: 可调式
输出数: 2
输出电压: 0.8 V ~ 28 V
输入电压: 4.5 V ~ 23 V
PWM 型: 电压模式
频率 - 开关: 200kHz ~ 2.2MHz
电流 - 输出: 1A,2A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
包装: 管件
供应商设备封装: 32-TQFN-EP(5x5)
2.2MHz, Dual-Output Buck or Boost
Converter with POR and Power-Fail Output
Pin Description (continued)
PIN
28, 30
29
31, 32
EP
OUTPUT
2.5V/1A
NAME
PGND
SGND
SOURCE2
SGND
FUNCTION
Power Ground. Connect rectifier diode anode, input capacitor negative, output capacitor negative, and
VL bypass capacitor returns to PGND.
Signal Ground. Connect SGND to the exposed pad. Connect SGND and PGND together at a single point.
Connection to the Converter 2 Internal MOSFET Source.
Buck Converter Operation—connect SOURCE2 to the switched side of the inductor as shown in Figure 1.
Boost Converter Operation—connect SOURCE2 to PGND (Figure 9).
Exposed Paddle. Connect to SGND. Solder EP to the SGND plane for better thermal performance.
PGOOD1
VL
OUTPUT
3.3V/2A
32
31
30
29
28
27
26
25
VL
CLOCK
OUT
SOURCE2 PGND SGND PGND SOURCE1 PGOOD1
1 CLKOUT FSEL1 24
VL
2 BST2/VDD2
3 DRAIN2
4 DRAIN2
EP
SGND
BST1/VDD1 23
DRAIN1 22
DRAIN1 21
ON
OFF
5 EN2
MAX5072
EN1 20
ON
OFF
6 FB2
FB1 19
7 COMP2
COMP1 18
VOUT1
VL
8 PFO
RST 17
PFO
SYNC PFI
OSC
V+
VL
VL BYPASS MR
DYING GASP
9 10
11
12
13
14 15
16
SGND
μ P RESET INPUT
V IN = 5.5V TO 23V
PGND
SYSTEM
CLOCK
SGND*
MANUAL
RESET
*CONNECT PGND AND SGND TOGETHER AT ONE POINT NEAR THE
RETURN TERMINALS OF THE V+ AND VL BYPASS CAPACITORS.
Figure 1. MAX5072 Dual Buck Regulator Application Circuit
______________________________________________________________________________________
11
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