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参数资料
| 型号： | MAX5088ATE+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 19/24页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 2A 16TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 20 V |
| 输入电压： | 4.5 V ~ 23 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 312kHz ~ 2.1MHz |
| 电流 - 输出： | 2A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-TQFN-EP（5x5） |
2.2MHz, 2A Buck Converters with an
Integrated High-Side Switch
Improving Noise Immunity
When using the MAX5088/MAX5089 in noisy environ-
ments, adjust the controller’s compensation to improve
the system ’s noise immunity. In particular, high-fre-
quency noise coupled into the feedback loop causes
duty-cycle jitter. One solution is to lower the crossover
frequency (see the Compensation section).
PC Board Layout Guidelines
Careful PC board layout is critical to achieve low-
switching power losses and clean stable operation.
Use a multilayer board whenever possible for better
noise immunity. Follow these guidelines for good PC
board layout:
1) Solder the exposed pad to a large copper plane
under the IC. To effectively use this copper area as
a heat exchanger between the PC board and the
ambient, expose this copper area on the top and
bottom side of the PC board. Do not make a direct
connection of the exposed pad copper plane to the
SGND (Pin 10) underneath the IC. Connect this
plane and SGND together at the return terminal of
the V+ bypass capacitor
2) Isolate the power components and high-current
paths from sensitive analog circuitry.
3) Keep the high-current paths short, especially at the
ground terminals. This practice is essential for sta-
ble, jitter-free operation.
4) Connect SGND and PGND together close to the
return terminals of the V L and V+ high-frequency
bypass capacitors near the IC. Do not connect them
together anywhere else.
5) Keep the power traces and load connections short.
This practice is essential for high efficiency. Use
thick copper PC boards to enhance full-load effi-
ciency and power dissipation capability.
6) Ensure that the feedback connection from FB to
C OUT is short and direct.
7) Route high-speed switching nodes (BST/VDD,
SOURCE) away from the sensitive analog areas
(BYPASS, COMP, FB, and OSC). Use internal PC
board layers for SGND as EMI shields to keep radi-
ated noise away from the IC, feedback dividers, and
the analog bypass capacitors.
Layout Procedure
1) Place the power components (inductor, C IN , and
C OUT ) first, with ground terminals close to each
other. Make all these connections on the top layer
with wide, copper-filled areas (2oz copper recom-
mended).
2) Group the gate-drive components (boost diodes
and capacitors, and V L bypass capacitor) together
near the controller IC.
3) Make the ground connections as follows:
a) Create a small-signal ground plane underneath
the IC.
b) Connect this plane to SGND and use this plane
for the ground connection for BYPASS, COMP,
FB, and OSC.
c) Connect SGND and PGND together at the
return terminal of V+ and V L bypass capacitors
near the IC. Make this the only connection
between SGND and PGND.
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