参数资料
型号: MAX5090CATE/V+T
厂商: Maxim Integrated Products
文件页数: 9/17页
文件大小: 0K
描述: IC REG BUCK ADJ 2A 16WQFN
产品变化通告: Product Discontinuation 28/Nov/2011
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 1.27 V ~ 11 V
输入电压: 6.5 V ~ 76 V
PWM 型: 电压模式
频率 - 开关: 127kHz
电流 - 输出: 2A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-WQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 16-TQFN-EP(5x5)
2A, 76V, High-Efficiency MAXPower Step-Down
DC-DC Converters
Boost High-Side Gate Drive (BST)
Connect a flying bootstrap capacitor between LX and
BST to provide the gate-drive voltage to the high-side
n-channel DMOS switch. The capacitor is alternately
charged from the internally regulated output-voltage VD
and placed across the high-side DMOS driver. Use a
0.22μF, 16V ceramic capacitor located as close to the
device as possible.
On startup, an internal low-side switch connects LX to
ground and charges the BST capacitor to (VD - V DIODE ).
Soft-Start (SS)
The MAX5090 provides the flexibility to externally pro-
gram a suitable soft-start time for a given application.
Connect an external capacitor from SS to SGND to use
the external soft-start. Soft-start gradually ramps up the
reference voltage seen by the error amplifier to control
the output’s rate of rise and reduce the input surge cur-
rent during startup. For soft-start time longer than 700μs,
use the following equation to calculate the soft-start
capacitor (C SS ) required for the soft-start time (t SS ):
Once the BST capacitor is charged, the internal low-side
switch is turned off and the BST capacitor voltage pro-
vides the necessary enhancement voltage to turn on the
high-side switch.
C SS =
10 × 10 ? 6 × t SS
1 . 46
Synchronization (SYNC)
SYNC controls the oscillator frequency. Connect SYNC
to SGND to select 127kHz operation. Use the SYNC
input to synchronize to an external clock. SYNC has a
guaranteed frequency range of 119kHz to 200kHz
when using an external clock.
When SYNC is connected to SGND, the internal clock
is used to generate a ramp with the amplitude in pro-
portion to V IN and the period corresponding to the
internal clock frequency to modulate the duty cycle of
the high-side switch.
If an external clock (SYNC clock) is applied at SYNC for
four cycles, the MAX5090 selects the SYNC clock. The
MAX5090 generates a ramp (SYNC ramp) with the
amplitude in proportion to V IN and the period corre-
sponding to the SYNC clock frequency. The MAX5090
initially blanks the SYNC ramp for 375μs (typ) to allow
the ramp to reach its target amplitude (proportion to the
V IN supply). After the SYNC blanking time, the SYNC
ramp and the SYNC clock switch to the PWM controller
and replace the internal ramp and the internal clock,
respectively. If the SYNC clock is removed for three
internal clock cycles, the internal clock and the internal
ramp switch back to the PWM controller.
The minimum pulse-width requirement for the external
clock is 350ns, and if the requirement is not met, the
MAX5090 could ignore the clock as a noisy bounce.
where t SS > 700μs and C SS is in Farads.
The MAX5090 also provides an internal soft-start
(700μs, typ) with a current source to charge an internal
capacitor to rise up to the bandgap reference voltage.
The internal soft-start voltage will eventually be pulled
up to 3.4V. The internal soft-start reference also feeds
to the error amplifier. The error amplifier takes the low-
est voltage among SS, the internal soft-start voltage,
and the bandgap reference voltage as the input refer-
ence for V OUT .
Soft-start occurs when power is first applied and when
the device exits shutdown. The MAX5090 also goes
through soft-start when coming out of thermal-overload
protection. During a soft-start, if the voltage at SS (V SS )
is charged up to 1.46V in less than 700μs, the
MAX5090 takes its default internal soft-start (700μs) to
ramp up as its reference. After the SS and the internal
soft-start ramp up over the bandgap reference, the
error amplifier takes the bandgap reference.
Thermal-Overload Protection
The MAX5090 features integrated thermal-overload
protection. Thermal-overload protection limits power
dissipation in the device, and protects the device from
a thermal overstress. When the die temperature
exceeds +175°C, an internal thermal sensor signals the
shutdown logic, turning off the internal power MOSFET,
resetting the internal soft-start and allowing the IC to
cool. The thermal sensor turns the internal power
MOSFET back on after the IC’s die temperature cools
down to +155°C, resulting in a pulsed output under
continuous thermal-overload conditions.
_______________________________________________________________________________________
9
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