参数资料
型号: MAX5091AATA+T
厂商: Maxim Integrated Products
文件页数: 8/15页
文件大小: 0K
描述: IC REG LDO 5V .1A 8-TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
稳压器拓扑结构: 正,固定式
输出电压: 5V
输入电压: 最高 28V
电压 - 压降(标准): 0.3V @ 100mA
稳压器数量: 1
电流 - 输出: 100mA
电流 - 限制(最小): 160mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-WDFN 裸露焊盘
供应商设备封装: 8-TDFN-EP(3x3)
包装: 标准包装
产品目录页面: 1411 (CN2011-ZH PDF)
其它名称: MAX5091AATA+TDKR
28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
Typical Operating Characteristics (continued)
(Typical Application Circuit, V S = +14V, C IN = 10μF, C OUT = 10μF, V SI = 0V, V EN = +2.4V, V OUT = +5V, T A = +25°C, unless other-
wise noted.)
V OUT STARTUP RESPONSE
MAX5091 toc21
I OUT = 10mA
V OUT
ENABLE RESPONSE
MAX5091 toc22
I OUT = 100mA
SHUTDOWN RESPONSE
MAX5091 toc23
I OUT = 100mA
V OUT
0V
2V/div
V S
5V/div
0V
V OUT
5V/div
EN
2V/div
0V
EN
2V/div
0V
10ms/div
0V
200 μ s/div
5V/div
200 μ s/div
0V
Pin Description
PIN
1
2
3
4
5
6
7
8
EP
NAME
V S
SI
EN
CT
GND
RES
SO
V OUT
EP
FUNCTION
Regulator Input. Operating supply range is from +5V to +28V and withstands 40V transients. Bypass
V S to GND with a 10μF capacitor.
Voltage Sense/Power-Fail Comparator Input. SI is the noninverting input of an uncommitted comparator. SO
asserts low if V SI drops below the reference level, V ST .
Enable Input. Leave unconnected (or pull EN high) to turn on the regulator. Pull EN low to place the device in
shutdown mode. EN is internally pulled up to 3.6V.
Reset Timeout Delay Capacitor Connection. Connect a capacitor from CT to GND to program the reset
timeout period/reset pulse delay. During regulation, CT is pulled up to V OUT . CT is pulled low during reset,
when EN is low, or when in thermal shutdown.
Ground. Bypass the input and output capacitors to the GND plane. Solder to large pads or the circuit-board
ground plane to maximize thermal dissipation.
Active-Low Reset Output. Pull up externally to V OUT . Open-drain RES goes low when V OUT is below the reset
threshold. Once output voltage is in regulation, RES goes high after the programmed reset timeout period is
over. RES is low when EN is low or in thermal shutdown.
Voltage Sense/Power-Fail Comparator Output. Pull up externally to V OUT . Open-drain SO asserts
low when V SI drops below the reference level, V ST . SO also asserts low when EN is low or in thermal
shutdown.
Regulator Output. Fixed at +5V (MAX5091A) or +3.3V (MAX5091B). Bypass with a 10μF ceramic capacitor to
GND.
Exposed Paddle. EP is internally connected to GND. Connect EP to GND to provide a low thermal-resistance
path from the IC junction to the PC board. Do not use as the only electrical connection to GND.
8
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