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参数资料
| 型号： | MAX5258EEE |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 17/20页 |
| 文件大小： | 0K |
| 描述： | IC DAC 8BIT OCTAL 5V R-R 16-QSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 100 |
| 设置时间： | 10µs |
| 位数： | 8 |
| 数据接口： | 串行 |
| 转换器数目： | 8 |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-QSOP |
| 包装： | 管件 |
| 输出数目和类型： | 8 电压，单极 |
| 采样率（每秒）： | * |
MAX5258/MAX5259
+3V/+5V, Low-Power, 8-Bit Octal DAC
with Rail-to-Rail Output Buffers
6
_______________________________________________________________________________________
TIMING CHARACTERISTICS (MAX5259)
(VREF = +2.5V, GND = 0, CDOUT = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3V and
TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VDD Rise-to-CS Fall-Setup Time
tVDCS
5
s
LDAC Pulse Width Low
tLDAC
40
20
ns
CS Rise-to-LDAC Fall-Setup Time
(Note 4)
tCLL
40
ns
CS Pulse Width High
tCSW
90
ns
SCLK Clock Frequency (Note 5)
fCLK
10
MHz
SCLK Pulse Width High
tCH
40
ns
SCLK Pulse Width Low
tCL
40
ns
CS Fall-to-SCLK Rise-Setup Time
tCSS
40
ns
SCLK Rise-to-
CS Rise-Hold Time
tCSH
0ns
DIN to SCLK Rise-to-Setup Time
tDS
40
ns
DIN to SCLK Rise-to-Hold Time
tDH
0ns
SCLK Rise-to-DOUT Valid
Propagation Delay (Note 6)
tDO1
200
ns
SCLK Fall-to-DOUT Valid
Propagation Delay (Note 7)
tDO2
210
ns
CS Rise-to-SCLK Rise-Setup
Time
tCS1
40
ns
Note 1: INL and DNL are measured with RL referenced to ground. Nonlinearity is measured from the first code that is greater than or
equal to the maximum offset specification to code FF hex (full scale). (See DAC Linearity and Voltage Offset section.)
Note 2: Output settling time is measured from the 50% point of the rising edge of CS to 1/2LSB of the final value of VOUT.
Note 3: Guaranteed by design, not production tested.
Note 4: If LDAC is activated prior to the rising edge of CS, it must remain low for tLDAC or longer after CS goes high.
Note 5: When DOUT is not used. If DOUT is used, fCLK (max) is 4MHz due to SCLK to DOUT propagation delay.
Note 6: Serial data is clocked-out at SCLK’s rising edge (measured from 50% of the clock edge to 20% or 80% of VDD).
Note 7: Serial data is clocked-out at SCLK’s falling edge (measured from 50% of the clock edge to 20% or 80% of VDD).
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX5258EEE+ | 功能描述:数模转换器- DAC 8-Bit 8Ch Precision DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| MAX5258EEE+T | 功能描述:数模转换器- DAC 8-Bit 8Ch Precision DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| MAX5258EEE-T | 功能描述:数模转换器- DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| MAX5258EVKIT+ | 功能描述:数据转换 IC 开发工具 MAX5258/59 Eval Kit RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
| MAX5259EEE | 功能描述:数模转换器- DAC 8-Bit 8Ch Precision DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
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