参数资料
型号: MAX525ACPP+
厂商: Maxim Integrated Products
文件页数: 16/16页
文件大小: 0K
描述: IC DAC 12BIT QUAD LP 20-DIP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 18
设置时间: 12µs
位数: 12
数据接口: 串行
转换器数目: 4
电压电源: 单电源
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: 20-DIP(0.300",7.62mm)
供应商设备封装: 20-PDIP
包装: 管件
输出数目和类型: 4 电压,单极;4 电压,双极
采样率(每秒): *
In power-down mode, the MAX525 output amplifiers
and the reference inputs enter a high-impedance state.
The serial interface remains active. Data in the input
registers is retained in power-down, allowing the
MAX525 to recall the output states prior to entering
shutdown. Start up from power-down either by recalling
the previous configuration or by updating the DACs
with new data. When powering up the device or bring-
ing it out of shutdown, allow 15s for the outputs to sta-
bilize.
Serial-Interface Configurations
The MAX525’s 3-wire serial interface is compatible
with both MICROWIRE (Figure 2) and SPI/QSPI
(Figure 3). The serial input word consists of two address
bits and two control bits followed by 12 data bits
(MSB first), as shown in Figure 4. The 4-bit address/
control code determines the MAX525’s response out-
lined in Table 1. The connection between DOUT and
the serial-interface port is not necessary, but may be
used for data echo. Data held in the MAX525’s shift
register can be shifted out of DOUT and returned to the
microprocessor (P) for data verification.
The MAX525’s digital inputs are double buffered.
Depending on the command issued through the serial
interface, the input register(s) can be loaded without
affecting the DAC register(s), the DAC register(s) can
be loaded directly, or all four DAC registers can be
updated simultaneously from the input registers
(Table 1).
Serial-Interface Description
The MAX525 requires 16 bits of serial data. Table 1 lists
the serial-interface programming commands. For cer-
tain commands, the 12 data bits are “don’t cares.” Data
is sent MSB first and can be sent in two 8-bit packets or
one 16-bit word (CS must remain low until 16 bits are
transferred). The serial data is composed of two DAC
address bits (A1, A0) and two control bits (C1, C0),
followed by the 12 data bits D11…D0 (Figure 4). The
4-bit address/control code determines:
The register(s) to be updated
The clock edge on which data is to be clocked out
through the serial-data output (DOUT)
The state of the user-programmable logic output
(UPO)
If the part is to go into shutdown mode (assuming
PDL is high)
How the part is configured when coming out of shut-
down mode.
MAX525
Low-Power, Quad, 12-Bit Voltage-Output DAC
with Serial Interface
_______________________________________________________________________________________
9
SCLK
DIN
DOUT*
CS
SK
SO
SI*
I/O
MAX525
MICROWIRE
PORT
*THE DOUT-SI CONNECTION IS NOT REQUIRED FOR WRITING TO THE MAX525,
BUT CAN BE USED FOR READBACK PURPOSES.
Figure 2. Connections for Microwire
DOUT*
DIN
SCLK
CS
MISO*
MOSI
SCK
I/O
SPI/QSPI
PORT
SS
+5V
CPOL = 0, CPHA = 0
*THE DOUT-MISO CONNECTION IS NOT REQUIRED FOR WRITING TO THE MAX525,
BUT CAN BE USED FOR READBACK PURPOSES.
MAX525
Figure 3. Connections for SPI/QSPI
Figure 4. Serial-Data Format
MSB ..................................................................................LSB
16 Bits of Serial Data
Address
Bits
Control
Bits
Data Bits
MSB.............................................LSB
A1
A0
C1
C0
D11................................................D0
12 Data Bits
4 Address/
Control Bits
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