参数资料
型号: MAX5422
厂商: Maxim Integrated Products, Inc.
元件分类: 通用总线功能
英文描述: 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers
中文描述: 四2输入与门
文件页数: 8/11页
文件大小: 614K
代理商: MAX5422
M
(
CS
), data clock (SCLK), and data in (DIN). Drive
CS
low to enable the serial interface and clock data syn-
chronously into the shift register on each SCLK rising
edge.
The WRITE commands (C1, C0 = 00 or 01) require 16
clock cycles to clock in the command and data (Figure
2a). The COPY commands (C1, C0 = 10, 11) can use
either eight clock cycles to transfer the command bits
(Figure 2b) or 16 clock cycles with 8 data bits that are
disregarded by the device (Figure 2a).
Table 1. Register Map
After loading data into the shift register, drive
CS
high
to latch the data into the appropriate potentiometer
control register and disable the serial interface. Keep
CS
low during the entire serial-data stream to avoid
corruption of the data.
The serial-data timing for the potentiometer is shown in
Figures 1 and 2.
256-Tap, Nonvolatile, SPI-Interface,
Digital Potentiometers
8
_______________________________________________________________________________________
CLOCK EDGE
Bit name
Write wiper register
Write NV register
1
0
0
2
0
0
3
4
5
0
0
6
0
0
7
0
0
8
0
0
9
10
D6
D6
D6
11
D5
D5
D5
12
D4
D4
D4
13
D3
D3
D3
14
D2
D2
D2
15
D1
D1
D1
16
D0
D0
D0
C1
0
0
C0
0
1
D7
D7
D7
Copy wiper register to NV
register
0
0
1
0
0
0
0
0
Copy NV register to wiper
register
0
0
1
1
0
0
0
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
D7
D6
D5
D4
D3
D2
D1
D0
C1
C0
SCLK
DIN
A) 16-BIT COMMAND/DATA WORD
1
2
3
4
5
6
7
8
C1
C0
SCLK
DIN
B) 8-BIT COMMAND WORD
CS
CS
Figure 2. Digital-Interface Format
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