参数资料
型号: MAX5851ETL+T
厂商: Maxim Integrated Products
文件页数: 8/18页
文件大小: 0K
描述: IC DAC 8BIT DUAL 80MSPS 40-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
设置时间: 12ns
位数: 8
数据接口: 并联
转换器数目: 2
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(6x6)
包装: 带卷 (TR)
输出数目和类型: 4 电流,单极
采样率(每秒): 80M
MAX5851
Dual, 8-Bit, 80Msps, Current-Output DAC
16
______________________________________________________________________________________
*Vias connect the land pattern to internal or external copper planes.
power-supply, and ground connections, which can
affect dynamic specifications, like signal-to-noise ratio
or spurious-free dynamic range. In addition, electro-
magnetic interference (EMI) can either couple into or
be generated by the MAX5851. Observe the grounding
and power-supply decoupling guidelines for high-
speed, high-frequency applications. Follow the power-
supply and filter configuration to realize optimum
dynamic performance.
Use of a multilayer printed circuit (PC) board with sepa-
rate ground and power-supply planes is recommend-
ed. Run high-speed signals on lines directly above the
ground plane. The MAX5851 has separate analog and
digital ground buses (AGND, CGND, and DGND,
respectively). Provide separate analog, digital, and
clock ground sections on the PC board with only one
point connecting the three planes. The ground connec-
tion points should be located underneath the device
and connected to the exposed paddle. Run digital sig-
nals above the digital ground plane and analog/clock
signals above the analog/clock ground plane. Digital
signals should be kept away from sensitive analog,
clock, and reference inputs. Keep digital signal paths
short and metal trace lengths matched to avoid propa-
gation delay and data skew mismatch.
The MAX5851 includes three separate power-supply
inputs: analog (AVDD), digital (DVDD), and clock
(CVDD). Use a single linear regulator power source to
branch out to three separate power-supply lines (AVDD,
DVDD, CVDD) and returns (AGND, DGND, CGND).
Filter each power-supply line to the respective return
line using LC filters comprising ferrite beads and 10F
capacitors. Filter each supply input locally with 0.1F
ceramic capacitors to the respective return lines.
Note: To maintain the dynamic performance of the
Electrical Characteristics
, ensure the voltage differ-
ence between DVDD, AVDD, and CVDD does not
exceed 150mV.
Thermal Characteristics and Packaging
Thermal Resistance
40-lead thin QFN-EP:
θJA = 38°C/W
The MAX5851 is packaged in a 40-pin thin QFN-EP
package, providing greater design flexibility, increased
thermal efficiency, and optimized AC performance of
the DAC. The EP enables the implementation of
grounding techniques, which are necessary to ensure
highest performance operation.
In this package, the data converter die is attached to an
EP lead frame with the back of this frame exposed at the
package bottom surface, facing the PC board side of
the package. This allows a solid attachment of the pack-
age to the PC board with standard infrared (IR) flow sol-
dering techniques. A specially created land pattern on
the PC board, matching the size of the EP (4.1mm
4.1mm), ensures the proper attachment and grounding
of the DAC. Designing vias* into the land area and
implementing large ground planes in the PC board
design allows for highest performance operation of the
DAC. Use an array of 3 3 vias (≤0.3mm diameter per
via hole and 1.2mm pitch between via holes) for this 40-
pin thin QFN-EP package (package code: T4066-1).
Dynamic Performance
Parameter Definitions
Total Harmonic Distortion (THD)
THD is the ratio of the RMS sum of all essential harmon-
ics (within a Nyquist window) of the input signal to the
fundamental itself. This can be expressed as:
where V1 is the fundamental amplitude, and V2 through
VN are the amplitudes of the 2nd through Nth order har-
monics. The MAX5851 uses the first seven harmonics
for this calculation.
Spurious-Free Dynamic Range (SFDR)
SFDR is the ratio of RMS amplitude of the carrier fre-
quency (maximum signal component) to the RMS value
of their next-largest spectral component. SFDR is usu-
ally measured in dBc with respect to the carrier fre-
quency amplitude or in dBFS with respect to the DAC’s
full-scale range. Depending on its test condition, SFDR
is observed within a predefined window or to Nyquist.
Multitone Power Ratio (MTPR)
A series of equally spaced tones are applied to the DAC
with one tone removed from the center of the range.
MTPR is defined as the worst-case distortion (usually a
3rd-order harmonic product of the fundamental frequen-
cies), which appears as the largest spur at the frequency
of the missing tone in the sequence. This test can be per-
formed with any number of input tones; however, four and
eight tones are among the most common test conditions
for CDMA- and GSM/EDGE-type applications.
THD
VVV
V
N
++
+
log
... ...
20
2
3
2
4
22
1
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相关代理商/技术参数
参数描述
MAX5852ETL 功能描述:数模转换器- DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube
MAX5852ETL+ 功能描述:数模转换器- DAC 8-Bit 2Ch 165Msps DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube
MAX5852ETL+T 功能描述:数模转换器- DAC 8-Bit 2Ch 165Msps DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube
MAX5852ETL-T 功能描述:数模转换器- DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube
MAX5852EVKIT 功能描述:数模转换器- DAC Evaluation Kit for the MAX5851 MAX5852 RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube