参数资料
型号: MAX5916AEUI+T
厂商: Maxim Integrated
文件页数: 17/25页
文件大小: 488K
描述: IC HOT-SWAP CTRLR DUAL 28-TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 热交换控制器
应用: PCI 2.2 服务器
内部开关:
电源电压: 10.8 V ~ 13.2 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-TSSOP
包装: 带卷 (TR)
Maximum Load Capacitance
Large capacitive loads can cause a problem when
inserting discharged PCI cards into the live backplane.
If the time needed to charge the capacitance of the
board is greater than the typical startup time, 50ms, a
fault can occur after startup.
The MAX5915/MAX5915A/MAX5916/MAX5916A are able
to withstand large capacitive loads due to their long start-
up time. Each supply has its own current-limit threshold.
Calculate the maximum load capacitance as follows:
C
BOARD
< 50ms x I
_, LIM
/ V
SUPPLY
Input Transients
The +12V and +3.3VAUX supplies must be above their
respective UVLO thresholds before startup can occur.
Input transients can cause the input voltage to sag
below the UVLO threshold. The MAX5915/MAX5915A/
MAX5916/MAX5916A reject input transients that are
shorter than t
DEG, UVLO
.
External MOSFET Thermal
Considerations
The power dissipation of the external MOSFET is low
when it is on, P
D
= I
LOAD
2
x R
DS(ON)
. A considerable
amount of power is dissipated during startup and con-
tinuous short-circuit conditions. The design must take
into consideration the worst-case scenario.
Layout Considerations
To take full advantage of the switch response time to an
output fault condition, keep all traces as short as possi-
ble and maximize the high-current trace dimensions to
reduce the effect of undesirable parasitic inductance.
Place the MAX5915/MAX5915A/MAX5916/MAX5916A
close to the PCI cards connector. Use a ground plane
to minimize impedance and inductance. Minimize the
current-sense resistor trace length and ensure accurate
current sensing with Kelvin connections (Figure 9).
When an output is short circuited, the voltage drop
across the external MOSFET becomes large. Hence the
power dissipation across the switch and die tempera-
ture both increase. An efficient way to achieve good
power dissipation on a surface-mount package is to lay
out two copper pads directly under the package on
both sides of the board. Connect the two pads to the
ground plane through vias, and use enlarged copper
mounting pads on the topside of the board.
Chip Information
TRANSISTOR COUNT: 1021
PROCESS: BiCMOS
Dual PCI 2.2 Hot-Swap Controllers
______________________________________________________________________________________   17
Table 2. Logic Diagram Signal Descriptions
SIGNAL NAME
DESCRIPTION
Enable_+12VIN
Signal is HIGH:
1. +12VIN > V
UVLO, +12V
2. ON_ = HIGH
3. Thermal shutdown NOT active
Startup_+12VIN
Signal is HIGH:
1. +12VIN > V
UVLO, +12V
2. ON_ = HIGH
3. t
START
 has elapsed
Enable_3.3VAUXIN
Signal is HIGH
1. 3.3VAUXIN > V
UVLO, AUX
2. AUXON_ = HIGH
3. Thermal shutdown NOT active
Startup_3.3VAUXIN
Signal is HIGH:
1. 3.3VAUXIN > V
UVLO, AUX
2. AUXON_ = HIGH
3. t
START
 has elapsed
OC_
Signal is HIGH when an overcurrent condition exists on the output of the supply.
UV_
Signal is HIGH when an undervoltage condition exists on the output of the supply.
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