参数资料
型号: MAX5921FESA+
厂商: Maxim Integrated
文件页数: 8/18页
文件大小: 386K
描述: IC HOT-SWAP CTRLR -48V 8-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 100
类型: 热交换控制器
应用: 通用
内部开关:
电源电压: -20 V ~ -80 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
-48V Hot-Swap Controllers with External
R
SENSE
and High Gate Pulldown Current
8  _______________________________________________________________________________________
Detailed Description
The MAX5921/MAX5939 integrated hot-swap controllers
for -48V power systems allow circuit boards to be safely
hot plugged into a live backplane without causing a
glitch on the power-supply rail. When circuit boards are
inserted into a live backplane, the bypass capacitors at
the input of the boards power module or switching
power supply can draw large inrush currents as they
charge. Uncontrolled inrush currents can cause glitches
on the system power supply and damage components
on the board.
The MAX5921/MAX5939 provide a controlled turn-on to
circuit cards preventing damage to connectors, board
components, and prevent glitches on the power-supply
rail. Both the MAX5921/MAX5939 provide undervolt-
age, overvoltage, and overcurrent protection. The
MAX5921/MAX5939 ensure that the input voltage is sta-
ble and within tolerance before applying power to the
load. The device also provides protection against input
voltage steps by limiting the load current to a safe level
without turning off power to the load.
Pin Description
PIN
MAX   21A
MAX   21E
MAX
A
MAX
E
MAX5921B/
MAX5921F
MAX5939B/
MAX5939F
NAME
FUNCTION
1

PWRGD
Power-Good Signal Output. PWRGD is an active-low open-drain status output referenced
to V
EE
. PWRGD latches low when V
DRAIN
 - V
EE
 d V
DL
 and V
GATE
> V
GATE
 indicating a
power-good condition. PWRGD is open drain otherwise.

1
PWRGD
Power-Good Signal Output. PWRGD is an active-high open-drain status output refer-
enced to DRAIN. PWRGD latches in a high-impedance state when V
DRAIN
 - V
EE
 d V
DL
and V
GATE
 > V
GATE
- V
GH
 indicating a power-good condition. PWRGD is pulled low to
DRAIN otherwise.
2
2
OV
Overvoltage Detection Input. OV is referenced to V
EE
. When OV is pulled above V
OVH
voltage, GATE pulls low. GATE remains low until the OV voltage reduces to V
OVH
 -
V
OVHY
.
3
3
UV
Undervoltage Detection Input. UV is referenced to V
EE
. When UV is pulled above V
UVH
voltage, the GATE is enabled. When UV is pulled below V
UVL
, GATE pulls low.
UV is also used to reset the circuit breaker after a fault condition. To reset the circuit
breaker, pull UV below V
UVL
. The reset command can be issued immediately after a fault
condition; however, the device will not restart until a t
OFF
 delay time has elapsed after the
fault condition is removed.
4
4
V
EE
Negative Power-Supply Input. Connect to the negative power-supply rail.
5
5
SENSE
Current-Sense Input. Connect to the external sense resistor and the source of the external
MOSFET. The voltage drop across the external sense resistor is monitored to detect
overcurrent or short-circuit fault conditions. Connect SENSE to V
EE
 to disable the current-
limiting feature.
6
6
GATE
Gate Drive Output. Connect to the gate of the external N-channel MOSFET.
7
7
DRAIN
Output Voltage Sense Input. Connect to the output voltage node (drain of external N-
channel MOSFET). Place the MAX5921/MAX5939 such that DRAIN is close to the drain of
the external MOSFET for the best thermal protection.
8
8
V
DD
Positive Power-Supply Input. This is the power ground in the negative supply voltage
system. Connect to the higher potential of the power-supply inputs.
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