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参数资料
| 型号： | MAX5965AUAX+ |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet; Package: SSOP;36 pin;163 mm² ; Temperature: 0°C to +85°C |
| 中文描述： | 4-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO36 |
| 封装： | ROHS COMPLIANT, SSOP-36 |
| 文件页数： | 18/54页 |
| 文件大小： | 1525K |
| 代理商： | MAX5965AUAX+ |
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MAX5965A/MAX5965B
High-Power, Quad, Monolithic, PSE Controllers
for Power over Ethernet
______________________________________________________________________________________
25
Serial Addressing
Each transmission consists of a START condition (Figure
6) sent by a master, followed by the MAX5965A/
MAX5965B 7-bit slave address plus R/W bit, a register
address byte, one or more data bytes, and finally a
STOP condition.
START and STOP Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master fin-
ishes communicating with the slave, the master issues
a STOP (P) condition by transitioning SDA from low to
high while SCL is high. The STOP condition frees the
bus for another transmission.
Bit Transfer
Each clock pulse transfers one data bit (Figure 7). The
data on SDA must remain stable while SCL is high.
Acknowledge
The acknowledge bit is a clocked 9th bit (Figure 8) that
the recipient uses to handshake receipt of each byte of
data. Thus each byte effectively transferred requires 9
bits. The master generates the 9th clock pulse, and the
recipient pulls down SDA (or the SDAOUT in the 3-wire
interface) during the acknowledge clock pulse, so that
the SDA line is stable low during the high period of the
clock pulse. When the master transmits to the
MAX5965A/MAX5965B, the MAX5965A/MAX5965B
generate the acknowledge bit. When the MAX5965A/
MAX5965B transmit to the master, the master gener-
ates the acknowledge bit.
Figure 6. START and STOP Conditions
START
STOP
SP
SDA/
SDAIN
SCL
Figure 7. Bit Transfer
SDA
SCL
DATA LINE STABLE;
DATA VALID
.
CHANGE OF
DATA ALLOWED
Figure 8. Acknowledge
SCL
SDA
BY TRANSMITTER
CLOCK PULSE FOR ACKNOWLEDGEMENT
START CONDITION
SDA
BY RECEIVER
12
8
9
S
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX5965AUAX+ | 功能描述:热插拔功率分布 Quad PSE Controller for POE RoHS:否 制造商:Texas Instruments 产品:Controllers & Switches 电流限制: 电源电压-最大:7 V 电源电压-最小:- 0.3 V 工作温度范围: 功率耗散: 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Tube |
| MAX5965AUAX+T | 功能描述:热插拔功率分布 Quad PSE Controller for POE RoHS:否 制造商:Texas Instruments 产品:Controllers & Switches 电流限制: 电源电压-最大:7 V 电源电压-最小:- 0.3 V 工作温度范围: 功率耗散: 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Tube |
| MAX5965BCAX+ | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube |
| MAX5965BCAX+T | 制造商:Maxim Integrated Products 功能描述:HIGH-POWER, QUAD, MONOLITHIC, PSE CONTROLLERS FOR POWER OVER - Tape and Reel |
| MAX5965BEAX+ | 功能描述:热插拔功率分布 Quad PSE Controller for POE RoHS:否 制造商:Texas Instruments 产品:Controllers & Switches 电流限制: 电源电压-最大:7 V 电源电压-最小:- 0.3 V 工作温度范围: 功率耗散: 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Tube |
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