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参数资料
| 型号： | MAX6329VHUT+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 3/11页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 1.8V/ADJ .15A SOT23-6 |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 稳压器拓扑结构： | 正，固定式或可调式 |
| 输出电压： | 1.8V，1.23 V ~ 5 V |
| 输入电压： | 2.5 V ~ 5.5 V |
| 电压 - 压降（标准）： | 0.6V @ 150mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 150mA（最小） |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 |
| 供应商设备封装： | SOT-6 |
| 包装： | 带卷 (TR) |
150mA, SOT23, Low Dropout Linear Regulators
with Internal Microprocessor Reset Circuit
ELECTRICAL CHARACTERISTICS (continued)
(V IN = +3.6V, T A = -0 ° C to +85 ° C. Typical values are at I OUT = 0, C OUT = 2.2μF, T A = +25 ° C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
RESET CIRCUIT
MAX63_9T SET = GND
MAX63_9S SET = GND
MAX63_9Z SET = GND
2.92
2.75
2.21
3.185
3.02
2.41
Reset Threshold (Note 2)
V TH
MAX63_9Y SET = GND
MAX63_9W SET = GND
2.08
1.59
2.28
1.74
V
MAX63_9V SET = GND
1.50
1.65
MAX63_9T/Z/W SET = divider, Figure 1 (Note 4)
MAX63_9S/Y/V SET = divider, Figure 1 (Note 4)
0.885 ? V ADJ 0.965 ? V ADJ
0.835 ? V ADJ 0.915 ? V ADJ
Reset Timeout Period
V OUT to Reset Delay
t RP
t RD
100
200
35
300
ms
μs
MR Input Voltage
MR Minimum Input Pulse
MR Glitch Rejection
MR to Reset Delay
V IL
V IH
MAX6349 only
MAX6349 only
MAX6349 only
MAX6349 only
0.8 ? V OUT
1
120
500
0.2 ? V OUT
V
μs
ns
ns
MR Pullup Resistance
Open-Drain RESET Output
Voltage
Open-Drain Reset Output
Leakage Current
Push-Pull RESET Output Voltage
V OL
I LKG
V OL
MAX6349 only
V OUT > 1.0V, I SINK = 50μA
V OUT > 2.7V, I SINK = 3.2mA
V OUT ≥ 1.0V, I SINK = 50μA
V OUT < V TH (min), I SINK = 3.2mA
10
20
50
0.3
0.4
1.0
0.3
0.4
k ?
V
μA
V
V OH
V OUT > V TH (max), I SOURCE = 500μA
0.8 ? V OUT
Push-Pull RESET Output Voltage
V OL
V OH
V OUT > V TH (max), I SINK = 3.2mA
V OUT < V TH , I SOURCE = 150μA
0.8 ? V OUT
0.4
V
Note 1: Limits over temperature are guaranteed by design and not production tested.
Note 2: Specification from 0 ° C to less than 25 ° C is guaranteed to four sigma only.
Note 3: Dropout voltage is defined as V IN - V OUT when V OUT is 2% below the value of V OUT for V IN = V OUT + 1V.
Note 4: V ADJ = VSET(1 + R1/R2), where VSET = 1.23V nominal.
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