参数资料
型号: MAX6355SWUT+T
厂商: Maxim Integrated Products
文件页数: 8/11页
文件大小: 0K
描述: IC SUPERVISOR MPU SOT23-6
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 多压监控器
监视电压数目: 3
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 最小为 100 ms
电压 - 阀值: 1.67V,2.93V,可调
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: SOT-23-6
供应商设备封装: SOT-6
包装: 带卷 (TR)
Dual/Triple-Voltage
μP Supervisory Circuits
During the normal operating mode, the supervisor will
issue a reset pulse for the reset timeout period (140ms
min) if the μP does not update the WDI with a valid tran-
V CC 2
V CC 1
sition (HIGH to LOW or LOW to HIGH) within the stan-
dard timeout period (1.6s min).
After each reset event (V CC power-up, manual reset, or
watchdog reset), there is an initial watchdog startup
V CC 1
V CC 2
RST
RST2
RST1
100k ?
timeout period of 25.6s. The startup mode provides an
extended period for the system to power up and fully
initialize all μP and system components before assum-
ing responsibility for routine watchdog updates. The
normal watchdog timeout period (1.6s min) begins at
the conclusion of the startup timeout period or after the
first transition on WDI before the conclusion of the start-
up period (Figure 3).
Applications Information
Ensuring a Valid RESET Output
Down to V CC = 0
In some systems, it is necessary to ensure a valid reset
even if V CC falls to 0. In these applications, use the cir-
cuit shown in Figure 4. Note that this configuration does
not work for the open-drain outputs of the MAX6352/
MAX6355/MAX6358.
MAX6351 MAX6356
MAX6353 MAX6357
MAX6354 MAX6359
MAX6360
GND
Figure 4. Ensuring a Valid Reset Low to V CC 1 and V CC 2 = 0
BUFFERED RESET TO OTHER SYSTEM COMPONENTS
V CC 2 V CC 1
Interfacing to μPs with
Bidirectional Reset Pins
Microprocessors with bidirectional reset pins will con-
tend with the push-pull outputs of these devices. To
prevent this, connect a 4.7k ? resistor between RESET
V CC 1
V CC 2
RST
RST2
RST1
4.7k ?
RESET
μ P
and the μP’s reset I/O port, as shown in Figure 5. Buffer
RESET as shown in the figure if this reset is used by
MAX6351–MAX6360
GND
other components in the system.
V TH
GND
Figure 5. Interfacing to μPs with Bidirectional Reset I/O
V CC
t WDI-NORMAL
1.6s MAX
WDI
t WDI-STARTUP
25.6s MAX
1.6s
MAX
TRANSISTOR COUNT: 855
Chip Information
RESET
140ms
Figure 3. Normal Watchdog Startup Sequence
8
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