参数资料
型号: MAX6365LKA26+T
厂商: Maxim Integrated Products
文件页数: 11/15页
文件大小: 0K
描述: IC SUPERVISOR MPU LP SOT23-8
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 备用电池电路
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 低有效
复位超时: 最小为 150 ms
电压 - 阀值: 2.63V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: SOT-23-8
供应商设备封装: SOT-23-8
包装: 带卷 (TR)
SOT23, Low-Power μP Supervisory Circuits
with Battery Backup and Chip-Enable Gating
Watchdog Software Considerations
One way to help the watchdog timer monitor the soft-
ware execution more closely is to set and reset the
watchdog at different points in the program rather than
pulsing the watchdog input periodically. Figure 4
shows a flow diagram in which the I/O driving the
watchdog is set low in the beginning of the program,
set high at the beginning of every subroutine or loop,
and set low again when the program returns to the
beginning. If the program should hang in any subrou-
tine, the problem would be quickly corrected.
Replacing the Backup Battery
When V CC is above V TH , the backup power source can
be removed without danger of triggering a reset pulse.
The device does not enter battery-backup mode when
V CC stays above the reset threshold voltage.
Negative-Going VCC Transients
These supervisors are relatively immune to short-dura-
when V CC experiences only small glitches is usually not
desirable.
The Typical Operating Characteristics section has a
Maximum Transient Duration vs. Reset Threshold
Overdrive graph for which reset is not asserted. The
graph was produced using negative-going V CC pulses,
starting at V CC and ending below the reset threshold by
the magnitude indicated (reset threshold overdrive).
The graph shows the maximum pulse width that a neg-
ative-going V CC transient can typically have without
triggering a reset pulse. As the amplitude of the tran-
sient increases (i.e., goes further below the reset
threshold), the maximum allowable pulse width
decreases. Typically, a V CC transient that goes 100mV
below the reset threshold and lasts for 30μs will not trig-
ger a reset pulse.
A 0.1μF bypass capacitor mounted close to the V CC
pin provides additional transient immunity.
tion, negative-going V CC transients. Resetting the μP
+2.4V TO +5.5V
START
0.1 μ F
V CC
BATT
BATT ON
OUT
CE OUT
CE
SET
WDI
LOW
MAX6367
CMOS RAM
SUBROUTINE
CE IN
ADDRESS
DECODE
A0–A15
OR PROGRAM LOOP
SET WDI
HIGH
μ P
GND
RESET
RESET
RETURN
Figure 3. MAX6367 BATT ON Driving an External Pass
Transistor
END
Figure 4. Watchdog Flow Diagram
______________________________________________________________________________________
11
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