参数资料
型号: MAX6401BS31+T
厂商: Maxim Integrated Products
文件页数: 5/9页
文件大小: 0K
描述: IC SUPERVISOR MPU 4-UCSP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 高有效
复位超时: 最小为 100 ms
电压 - 阀值: 3.08V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 4-WFBGA,CSPBGA
供应商设备封装: 4-UCSP(1.05x1.05)
包装: 带卷 (TR)
μP Supervisory Circuits in 4-Bump (2 ? 2)
Chip-Scale Package
Pin Description
PIN
MAX6400/MAX6402
MAX6403/MAX6405
A1
MAX6401/MAX6404
A1
NAME
GND
Ground
FUNCTION
Active-Low Reset Output, (Open-Drain or Push-Pull). RESET
is asserted low when the V CC input is below the selected
B1
RESET
reset threshold. RESET remains low for the reset timeout
period after V CC exceeds the device reset threshold. Open-
drain outputs require an external pullup resistor.
Active-High Reset Output. RESET remains high while V CC is
B1
RESET
below the reset threshold and for at least 100ms after V CC
rises above the reset threshold.
Active-Low Manual Reset. Internal 50k ? pullup to V CC . Pull
B2
B2
MR
low to assert a reset. Reset remains asserted as long as MR
is low and for the reset timeout period after MR goes high.
Leave unconnected or connect to V CC if unused.
A2
A2
V CC
Supply Voltage and Input for the Reset Threshold Monitor
Detailed Description
Reset Output
A microprocessor ’ s (μP ’ s) reset input starts the μP in a
known state. These μP supervisory circuits assert reset
to prevent code execution errors during power-up,
power-down, or brownout conditions.
RESET is guaranteed to be a logic low for V CC down to
1V. Once V CC exceeds the reset threshold, an internal
timer keeps RESET low for the reset timeout period;
after this interval, RESET goes high.
If a brownout condition occurs (V CC dips below the
reset threshold), RESET goes low. Any time V CC goes
below the reset threshold, the internal timer resets to
zero, and RESET goes low. The internal timer starts
after V CC returns above the reset threshold, and RESET
remains low for the reset timeout period.
The manual reset input ( MR ) can also initiate a reset,
see the Manual Reset Input section. The MAX6401/
MAX6404 have active-high RESET outputs that are the
inverse of the MAX6400/MAX6402/MAX6403/MAX6405
outputs (Figure 1).
Manual Reset Input
Many μP-based products require manual reset capabil-
ity, allowing the operator, a test technician, or external
logic circuit to initiate a reset. A logic low on MR asserts
reset. Reset remains asserted while MR is low, and for
the reset active timeout period (t RP ) after MR returns
high. This input has an internal 50k ? pullup resistor, so
it can be left open if it is not used. MR can be driven
with TTL or CMOS logic levels, or with open-drain/col-
lector outputs. Connect a normally open momentary
switch from MR to GND to create a manual reset func-
tion; external debouncing circuitry is not required. If MR
is driven from long cables or if the device is used in a
noisy environment, connect a 0.1μF capacitor from MR
to ground to provide additional noise immunity (see
Figure 1).
Applications Information
Interfacing to μP with Bidirectional
Reset Pins
Since the RESET output on the MAX6402/MAX6405 is
open-drain, these devices interface easily with (μPs)
that have bidirectional reset pins. Connecting the μP
supervisor ’ s RESET output directly to the microcon-
troller ’ s (μC ’ s) RESET pin with a single pullup resistor
allows either device to assert reset (Figure 2).
Negative-Going VCC Transients
These devices are relatively immune to short-duration,
negative-going V CC transients (glitches).
The Typical Operating Characteristics show the
Maximum Transient Duration vs. Reset Threshold
Overdrive graph, for which reset pulses are not gener-
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