参数资料
型号: MAX6414UK46+T
厂商: Maxim Integrated Products
文件页数: 8/12页
文件大小: 0K
描述: IC RESET MPU LOW PWR SOT23-5
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 可调节/可选择
电压 - 阀值: 4.625V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SC-74A,SOT-753
供应商设备封装: SOT-23-5
包装: 标准包装
产品目录页面: 1416 (CN2011-ZH PDF)
其它名称: MAX6414UK46+TDKR
MAX6412–MAX6420
Low-Power, Single/Dual-Voltage μP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
3.3V
V CC
10k ?
5.0V
impedance CMOS-logic inputs connected to RESET
can drift to undetermined voltages. This presents no
problems in most applications, since most μPs and
other circuitry do not operate with V CC below 1V.
In those applications where RESET must be valid down
MAX6414
MAX6417
MAX6420
RESET
5V SYSTEM
to 0, adding a pulldown resistor between RESET and
ground sinks any stray leakage currents, holding
RESET low (Figure 6). The value of the pulldown resis-
tor is not critical; 100k ? is large enough not to load
RESET and small enough to pull RESET to ground. For
applications using the MAX6413, MAX6416, and
MAX6419, a 100k ? pullup resistor between RESET and
GND
V CC will hold RESET high when V CC falls below 1V
(Figure 7). Open-drain RESET versions are not recom-
mended for applications requiring valid logic for V CC
down to 0V.
Figure 5. MAX6414/MAX6417/MAX6420 Open-Drain RESET
Output Allows use with Multiple Supplies
Interfacing to Other Voltages for Logic
V CC
Compatibility
The open-drain outputs of the MAX6414/MAX6417/
MAX6420 can be used to interface to μPs with other
logic levels. As shown in Figure 5, the open-drain out-
put can be connected to voltages from 0 to 5.5V. This
allows for easy logic compatibility to various micro-
processors.
Negative-Going V CC Transients
In addition to issuing a reset to the μP during power-up,
power-down, and brownout conditions, these supervisors
are relatively immune to short-duration negative-going
MAX6412
MAX6415
MAX6418
GND
V CC
RESET
100k ?
transients (glitches). The Maximum Transient Duration vs.
Reset Threshold Overdrive graph in the Typical
Operating Characteristics shows this relationship.
The area below the curve of the graph is the region in
which these devices typically do not generate a reset
Figure 6. Ensuring RESET Valid to V CC = 0V
V CC
pulse. This graph was generated using a negative-
going pulse applied to V CC , starting above the actual
reset threshold (V TH ) and ending below it by the magni-
tude indicated (reset-threshold overdrive). As the mag-
MAX6413
MAX6416
MAX6419
V CC
100k ?
nitude of the transient decreases (farther below the
reset threshold), the maximum allowable pulse width
decreases. Typically, a V CC transient that goes 100mV
below the reset threshold and lasts 50μs or less will not
cause a reset pulse to be issued.
Ensuring a Valid RESET or RESET
Down to V CC = 0V
When V CC falls below 1V, RESET /RESET current sink-
ing (sourcing) capabilities decline drastically. In the
case of the MAX6412, MAX6415, and MAX6418, high-
8
RESET
GND
Figure 7. Ensuring RESET Valid to V CC = 0V
Maxim Integrated
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