参数资料
型号: MAX6423XS27+T
厂商: Maxim Integrated Products
文件页数: 4/10页
文件大小: 0K
描述: IC MPU/RESET CIRC 2.70V SC70-4
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 可调节/可选择
电压 - 阀值: 2.7V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SC-82A,SOT-343
供应商设备封装: SC-70-4
包装: 带卷 (TR)
Low-Power, SC70/SOT μP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
Pin Description
PIN
MAX6340
SOT23
MAX6421
MAX6422
MAX6423
SOT143
SC70
MAX6424
MAX6425
SOT23
MAX6426
SOT23
NAME
FUNCTION
Set Reset Timeout Input. Connect a capacitor between SRT
1
3
3
5
1
SRT
and ground to set the timeout period. Determine the period as
follows: t RP = 2.73 ? 10 6 ? C SRT + 275μs with t RP in seconds
and C SRT in farads.
2
3
4
1
2
2
1
3
4
2
2, 3
5
GND
N.C.
V CC
Ground
Not Internally Connected. Can be connected to GND.
Supply Voltage and Reset Threshold Monitor Input
RESET changes from high to low whenever V CC drops below
5
1
4
RESET
the selected reset threshold voltage. RESET remains low for
the reset timeout period after V CC exceeds the reset
threshold.
4
4
RESET changes from low to high whenever V CC drops below
RESET
the selected reset threshold voltage. RESET remains high for
the reset timeout period after V CC exceeds the reset
threshold.
Detailed Description
Reset Output
3.3V
The reset output is typically connected to the reset input
of a μP. A μP’s reset input starts or restarts the μP in a
known state. The MAX6340/MAX6421 –MAX6426 μP
supervisory circuits provide the reset logic to prevent
code-execution errors during power-up, power-down,
and brownout conditions (see Typical Operating
V CC
LASER-TRIMMED
RESISTORS
V REF
10k ?
5.0V
Characteristics ).
RESET changes from high to low whenever V CC drops
below the threshold voltage. Once V CC exceeds the
threshold voltage, RESET remains low for the capacitor-
adjustable reset timeout period.
The MAX6422 active-high RESET output is the inverse
C SRT
SRT
RESET
TIMEOUT
MAX6340
MAX6423
MAX6425
MAX6426
RESET
N
GND
5V
SYSTEM
logic of the active-low RESET output. All device outputs
are guaranteed valid for V CC > 1V.
The MAX6340/MAX6423/MAX6425/MAX6426 are open-
drain RESET outputs. Connect an external pullup resis-
tor to any supply from 0 to 5.5V. Select a resistor value
large enough to register a logic low when RESET is
asserted and small enough to register a logic high
while supplying all input current and leakage paths
connected to the RESET line. A 10k ? to 100k ? pullup
is sufficient in most applications.
Figure 1. MAX6340/MAX6423/MAX6425/MAX6426 Open-Drain
RESET Output Allows Use with Multiple Supplies
Selecting a Reset Capacitor
The reset timeout period is adjustable to accommodate
a variety of μP applications. Adjust the reset timeout
period (t RP ) by connecting a capacitor (C SRT ) between
SRT and ground. Calculate the reset timeout capacitor
as follows:
4
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