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参数资料
| 型号： | MAX6426UK50-T |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | Low-Power, SC70/SOT µP Reset Circuits with Capacitor-Adjustable Reset Timeout Delay |
| 中文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5 |
| 封装： | MO-178AA, SOT-23, 5 PIN |
| 文件页数： | 5/10页 |
| 文件大小： | 254K |
| 代理商： | MAX6426UK50-T |
MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT P Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
4
_______________________________________________________________________________________
Detailed Description
Reset Output
The reset output is typically connected to the reset input
of a P. A P’s reset input starts or restarts the P in a
known state. The MAX6340/MAX6421–MAX6426 P
supervisory circuits provide the reset logic to prevent
code-execution errors during power-up, power-down,
and brownout conditions (see Typical Operating
Characteristics).
RESET changes from high to low whenever VCC drops
below the threshold voltage. Once VCC exceeds the
threshold voltage, RESET remains low for the capacitor-
adjustable reset timeout period.
The MAX6422 active-high RESET output is the inverse
logic of the active-low RESET output. All device outputs
are guaranteed valid for VCC > 1V.
The MAX6340/MAX6423/MAX6425/MAX6426 are open-
drain RESET outputs. Connect an external pullup resis-
tor to any supply from 0 to 5.5V. Select a resistor value
large enough to register a logic low when RESET is
asserted and small enough to register a logic high
while supplying all input current and leakage paths
connected to the RESET line. A 10k
to 100k pullup
is sufficient in most applications.
Selecting a Reset Capacitor
The reset timeout period is adjustable to accommodate
a variety of P applications. Adjust the reset timeout
period (tRP) by connecting a capacitor (CSRT) between
SRT and ground. Calculate the reset timeout capacitor
as follows:
Pin Description
PIN
MAX6340
MAX6421
MAX6422
MAX6423
MAX6424
MAX6425
MAX6426
SOT23
SOT143
SC70
SOT23
NAME
FUNCTION
1
3
5
1
SRT
Set Reset Timeout Input. Connect a capacitor between SRT
and ground to set the timeout period. Determine the period as
follows: tRP = 2.73 10
6 CSRT + 275s with tRP in seconds
and CSRT in farads.
2
1
2
3
2, 3
GND
Ground
3
—
4
—
N.C.
Not Internally Connected. Can be connected to GND.
42
1
2
5
VCC
Supply Voltage and Reset Threshold Monitor Input
51
4
RESET
RESET changes from high to low whenever VCC drops below
the selected reset threshold voltage. RESET remains low for
the reset timeout period after VCC exceeds the reset
threshold.
—
44
—
RESET
RESET changes from low to high whenever VCC drops below
the selected reset threshold voltage. RESET remains high for
the reset timeout period after VCC exceeds the reset
threshold.
MAX6340
MAX6423
MAX6425
MAX6426
VREF
CSRT
SRT
RESET
TIMEOUT
N
GND
RESET
LASER-TRIMMED
RESISTORS
VCC
3.3V
10k
5.0V
5V
SYSTEM
Figure 1. MAX6340/MAX6423/MAX6425/MAX6426 Open-Drain
RESET Output Allows Use with Multiple Supplies
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