参数资料
型号: MAX6467US31D7+T
厂商: Maxim Integrated Products
文件页数: 5/9页
文件大小: 0K
描述: IC MPU/RESET CIRC 3.075V SOT143
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 最小为 1.2 s
电压 - 阀值: 3.075V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: TO-253-4,TO-253AA
供应商设备封装: SOT-143-4
包装: 带卷 (TR)
Microprocessor Supervisory Reset Circuits
with Edge-Triggered, One-Shot Manual Reset
Pin Description
PIN
1
2
3
4
NAME
GND
RESET
MR
V CC
FUNCTION
Ground
Reset Output. RESET is an active-low open-drain (MAX6467) or push-pull (MAX6468) output. RESET asserts
low when V CC drops below the selected threshold and remains low for the V CC reset timeout period after
V CC rises above the threshold. The RESET one-shot asserts low for a fixed MR reset timeout period on the
falling edge of the manual reset input. The open-drain output requires an external pullup resistor.
Manual Reset Input. Drive MR low to initiate a reset output. MR controls an edge-triggered one-shot that
asserts RESET low for a fixed MR timeout period when MR is driven low. Internal timing circuitry ignores
switch close and open bounce to ensure proper one-shot reset timing.
Power-Supply Input. V CC provides power to the device and is also a monitored voltage. When V CC drops
below the selected threshold, RESET asserts low and remains low for the reset timeout period after V CC rises
above the threshold. For better noise immunity, bypass V CC to GND with a 0.1μF capacitor.
V CC
V TH
GND
SWITCH
SWITCH
SWITCH
MR
BOUNCE
BOUNCE
BOUNCE
GND
RESET
t RP
t MRP
t DEB
t MRP
GND
Figure 1. Timing Diagram
Detailed Description
Reset Output
The MAX6467 provides an active-low open-drain
RESET output. The MAX6468 provides an active-low
push-pull RESET output. RESET asserts low if V CC
drops below the selected threshold or if a falling edge
occurs on MR . RESET remains low for the V CC reset
timeout period after V CC increases above the threshold
voltage or is one-shot pulsed low for the MR timeout
period after a falling edge on MR .
Manual Reset Input
Many μP-based products require manual reset capability,
allowing the operator, a test technician, or external logic
circuitry to initiate a reset. A falling edge on MR asserts
RESET low. RESET is one-shot pulsed low for the MR
timeout period after a falling edge on MR . An internal
1.5k ? pullup resistor to V CC allows MR to be left uncon-
nected if not used. MR can be driven with TTL or CMOS-
logic levels, or with open-drain/collector outputs. Connect
a normally open momentary pushbutton switch from MR
to GND to realize a manual reset function. External
debounce circuitry is not required, as the MAX6467/
MAX6468 respond to the first falling edge on MR and
ignore subsequent falling edges within the reset timeout
period and during the MR debounce period (see Figure
1). After MR goes high for 150ms (t DEB ), the manual reset
one-shot is ready to trigger a reset on the next MR falling
edge. Connect a 0.1μF capacitor from MR to GND when
using long cables to provide additional noise immunity
(Figure 2).
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