参数资料
型号: MAX6476TA18AD3+T
厂商: Maxim Integrated
文件页数: 7/20页
文件大小: 0K
描述: IC REG LDO 1.8V/ADJ .3A 8-TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
稳压器拓扑结构: 正,固定式或可调式
输出电压: 1.8V,1.25 V ~ 5.5 V
输入电压: 2.5 V ~ 5.5 V
稳压器数量: 1
电流 - 输出: 300mA(最小)
电流 - 限制(最小): 450mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-WDFN 裸露焊盘
供应商设备封装: 8-TDFN-EP(3x3)
包装: 带卷 (TR)
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
MAX6469/MAX6470/MAX6477/MAX6478 Pin Description
PIN
BUMP
MAX6469/MAX6470
SOT23
TDFN-EP
MAX6477/MAX6478
UCSP
NAME
FUNCTION
1
2
3
1, 2
3
4
A1
A2
A3
IN
GND
SHDN
Regulator Input. Bypass IN to GND with a 0.1μF capacitor.
Ground. This pin also functions as a heatsink. Solder to large pads or
the circuit-board ground plane to maximize thermal dissipation.
Active-Low Shutdown Input. Connect SHDN to V IN for normal operation.
Active-Low Reset Output. RESET remains low while V OUT is below the
4
5
C3
RESET
reset threshold. RESET remains low for the duration of the reset timeout
period after the reset conditions are terminated. RESET is available in
open-drain and push-pull configurations.
Feedback Input for Externally Setting the Output Voltage. Connect SET
5
6
C2
SET
to GND to select the preset output voltage. Connect SET to an external
resistor-divider network for adjustable output operation.
6
7, 8
C1
OUT
Regulator Output. Bypass OUT to GND with a minimum 3.3μF low-ESR
capacitor.
Exposed Paddle (TDFN Only). EP is internally connected to GND.
EP
Connect EP to the ground plane to provide a low thermal-resistance
path from the IC junction to the PCB. Do not use as the electrical
connection to GND.
MAX6471/MAX6472/MAX6479/MAX6480 Pin Description
PIN
BUMP
MAX6471/MAX6472
SOT23
TDFN-EP
MAX6479/MAX6480
UCSP
NAME
FUNCTION
1
2
1, 2
3
A1
A2
IN
GND
Regulator Input. Bypass IN to GND with a 0.1μF capacitor.
Ground. This pin also functions as a heatsink. Solder to large pads or
the circuit-board ground plane to maximize thermal dissipation.
Active-Low Manual Reset Input. The reset output is asserted while MR
is pulled low and remains asserted for the duration of the reset timeout
3
4
A3
MR
period after MR transitions from low to high. Leave MR unconnected or
connect to V OUT if not used. MR has an internal pullup resistor of 40k ?
(typ) to V OUT .
Active-Low Reset Output. RESET remains low while V OUT is below the
reset threshold or while MR is held low. RESET remains low for the
4
5
C3
RESET
duration of the reset timeout period after the reset conditions are
terminated. RESET is available in open-drain and push-pull
configurations.
Feedback Input for Externally Setting the Output Voltage. Connect SET
5
6
C2
SET
to GND to select the preset output voltage. Connect SET to an external
resistor-divider network for adjustable output operation.
6
7, 8
C1
OUT
Regulator Output. Bypass OUT to GND with a minimum 3.3μF low-ESR
capacitor.
Exposed Paddle (TDFN Only). EP is internally connected to GND.
EP
Connect EP to the ground plane to provide a low thermal-resistance
path from the IC junction to the PCB. Do not use as the electrical
connection to GND.
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MAX6476TA18BD1+T 功能描述:低压差稳压器 - LDO RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压(最大值):307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20
MAX6476TA18BD1-T 功能描述:低压差稳压器 - LDO RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压(最大值):307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20
MAX6476TA18BD2+T 功能描述:低压差稳压器 - LDO RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压(最大值):307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20