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参数资料
| 型号： | MAX6650EUB+T |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | 运动控制电子 |
| 英文描述： | Fan-Speed Regulators and Monitors with SMBus™/I<sup>2</sup>C-Compatible Interface |
| 中文描述： | BRUSHLESS DC MOTOR CONTROLLER, 0.1 A, PDSO10 |
| 封装： | MICRO MAX PACKAGE-10 |
| 文件页数： | 24/25页 |
| 文件大小： | 315K |
| 代理商： | MAX6650EUB+T |
MAX6650/MAX6651
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
8
_______________________________________________________________________________________
SMBCLK
AB
C
D
E
FG
H
I
J
K
SMBDATA
tSU:STA
tHD:STA
tLOW
tHIGH
tSU:DAT
tHD:DAT
tSU:STO tBUF
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
E = SLAVE PULLS SMBDATA LINE LOW
L
M
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO SLAVE
H = LSB OF DATA CLOCKED INTO SLAVE
I = SLAVE PULLS SMBDATA LINE LOW
J = ACKNOWLEDGE CLOCKED INTO MASTER
K = ACKNOWLEDGE CLOCK PULSE
L = STOP CONDITION, DATA EXECUTED BY SLAVE
M = NEW START CONDITION
SMBCLK
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
AB
C
D
E
FG
H
I
J
SMBDATA
tSU:STA tHD:STA
tLOW
tHIGH
tSU:DAT
tSU:STO
tBUF
K
E = SLAVE PULLS SMBDATA LINE LOW
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO MASTER
H = LSB OF DATA CLOCKED INTO MASTER
I = ACKNOWLEDGE CLOCK PULSE
J = STOP CONDITION
K = NEW START CONDITION
Figure 3. SMBus Write Timing Diagram
Figure 4. SMBus Read Timing Diagram
Command-Byte Functions
The 8-bit Command-Byte Register (Table 2) is the mas-
ter index that points to the various other registers within
MAX6650/MAX6651. The register’s power-on reset
(POR) state is 0000 0000, so that a receive-byte trans-
mission (a protocol that lacks the command byte)
occurring immediately after POR returns the current
speed setting.
Fan-Speed Register
In closed-loop mode, the MAX6650/MAX6651 use the
Fan-Speed Register to set the period of the tachometer
signal that controls the fan speed. The Fan-Speed
Register is ignored in all other modes of operation. The
MAX6650/MAX6651 regulate the fan speed by forcing
the tachometer period (tTACH) equal to the scaled reg-
ister value. One revolution of the fan generates two
tachometer pulses, so the required Fan-Speed Register
value (KTACH) may be calculated as:
tTACH = 1 / (2 x Fan Speed)
KTACH = [tTACH x KSCALE x (fCLK / 128)] - 1
where the fan speed is in rotations per second (RPS),
tTACH is the period of the tachometer signal, fCLK is the
internal oscillator frequency (254kHz ±10%), and
KSCALE is the prescaler value (see Configuration-Byte
Register). Since the fan speed is inversely proportional
to the tachometer period, the Fan-Speed Register value
(KTACH) does not linearly control the fan speed (Table
3). Select the prescaler value so the fan’s full speed is
achieved with a register value of approximately 64
(0100 0000) to optimize speed range and resolution.
The MAX6651 may be controlled by an external oscilla-
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