参数资料
型号: MAX668EUB+T
厂商: Maxim Integrated Products
文件页数: 14/18页
文件大小: 0K
描述: IC REG CTRLR PWM HYBRID 10-UMAX
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 电流模式,混合
输出数: 1
频率 - 最大: 575kHz
占空比: 94%
电源电压: 3 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 带卷 (TR)
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in μMAX
I LDC = OUT OUT D
given output ripple. An inductance value larger than
L IDEAL may also be used, but output-filter capacitance
must be increased by the same proportion that L has to
L IDEAL . See the Capacitor Selection section for more
information on determining output filter values.
Due the MAX668/MAX669’s high switching frequencies,
inductors with a ferrite core or equivalent are recom-
mended. Powdered iron cores are not recommended
due to their high losses at frequencies over 50kHz.
Determining Peak Inductor Current
The peak inductor current required for a particular out-
put is:
I LPEAK = I LDC + (I LPP / 2)
where I LDC is the average DC input current and I LPP is
the inductor peak-to-peak ripple current. The I LDC and
I LPP terms are determined as follows:
I    (V    + V )
(V IN – V SW )
where V D is the forward voltage drop across the
Schottky rectifier diode (D1), and V SW is the drop
across the external FET, when on.
old NFETs that specify on-resistance with a gate-
source voltage (V GS ) of 2.7V or less. When selecting an
NFET, key parameters can include:
1) Total gate charge (Q g )
2) Reverse transfer capacitance or charge (C RSS )
3) On-resistance (R DS(ON) )
4) Maximum drain-to-source voltage (V DS(MAX) )
5) Minimum threshold voltage (V TH(MIN) )
At high switching rates, dynamic characteristics (para-
meters 1 and 2 above) that predict switching losses
may have more impact on efficiency than R DS(ON),
which predicts DC losses. Q g includes all capacitances
associated with charging the gate. In addition, this
parameter helps predict the current needed to drive the
gate at the selected operating frequency. The continu-
ous LDO current for the FET gate is:
I GATE = Q g x f OSC
For example, the MMFT3055L has a typical Q g of 7nC
(at V GS = 5V); therefore, the I GATE current at 500kHz is
3.5mA. Use the FET manufacturer’s typical value for Q g
in the above equation, since a maximum value (if sup-
plied) is usually too conservative to be of use in esti-
(V IN SW OUT D IN )
L x f OSC OUT D )
I LPP =
– V ) (V + V – V
(V + V
mating I GATE .
Diode Selection
I DIODE OUT + LPEAK OUT
where L is the inductor value. The saturation rating of
the selected inductor should meet or exceed the calcu-
lated value for I LPEAK , although most coil types can be
operated up to 20% over their saturation rating without
difficulty. In addition to the saturation criteria, the induc-
tor should have as low a series resistance as possible.
For continuous inductor current, the power loss in the
inductor resistance, P LR , is approximated by:
P LR ? (I OUT x V OUT / V IN ) 2 x R L
where R L is the inductor series resistance.
Once the peak inductor current is selected, the current-
sense resistor (R CS ) is determined by:
R CS = 85mV / I LPEAK
For high peak inductor currents (>1A), Kelvin sensing
connections should be used to connect CS+ and
PGND to R CS . PGND and GND should be tied together
at the ground side of R CS .
Power MOSFET Selection
The MAX668/MAX669 ’s high switching frequency
demands a high-speed rectifier. Schottky diodes are
recommended for most applications because of their
fast recovery time and low forward voltage. Ensure that
the diode’s average current rating is adequate using
the diode manufacturer’s data, or approximate it with
the following formula:
I - I
= I
3
Also, the diode reverse breakdown voltage must
exceed V OUT . For high output voltages (50V or above),
Schottky diodes may not be practical because of this
voltage requirement. In these cases, use a high-speed
silicon rectifier with adequate reverse voltage.
Capacitor Selection
Output Filter Capacitor
The minimum output filter capacitance that ensures sta-
bility is:
(2 π R CS IN(MIN) OSC )
The MAX668/MAX669 drive a wide variety of N-channel
power MOSFETs (NFETs). Since LDO limits the EXT
output gate drive to no more than 5V, a logic-level
C OUT(MIN) =
(7.5V x L / L IDEAL )
xV xf
NFET is required. Best performance, especially at low
input voltages (below 5V), is achieved with low-thresh-
14
where V IN(MIN) is the minimum expected input voltage.
Typically C OUT(MIN) , though sufficient for stability, will
Maxim Integrated
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