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参数资料
| 型号： | MAX6706ZKA+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 6/12页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR MPU LV SOT23-8 |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 多压监控器 |
| 监视电压数目： | 2 |
| 输出： | 推挽式，图腾柱 |
| 复位： | 高有效 |
| 复位超时： | 最小为 140 ms |
| 电压 - 阀值： | 2.32V，可调 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-8 |
| 供应商设备封装： | SOT-23-8 |
| 包装： | 带卷 (TR) |
Low-Voltage, SOT23 μP Supervisors with Power-
Fail In/Out, Manual Reset, and Watchdog Timer
Pin Description (continued)
PIN
MAX6701(A)
MAX6702(A) MAX6704
MAX6703(A)
MAX6705(A)
MAX6706(A) MAX6708
MAX6707(A)
NAME
FUNCTION
Active-Low Watchdog Output (Open Drain or Push-Pull). WDO
is asserted whenever the watchdog times out and V CC or the
reset inputs are below their respective thresholds. WDO
deasserts after a valid WDI transition without a reset timeout
8
—
8
—
WDO
period. In the A versions, WDO deasserts without a timeout
delay when V CC , RST_IN1, and RST_IN2 rises above its
threshold. Pull MR low to assert WDO (MAX6701/MAX6702/
MAX6703/MAX6705/MAX6706/MAX6707 only). Pull MR low to
deassert WDO (MAX6701(A)/MAX6702(A)/MAX6703(A)/
MAX6705(A)/MAX6706(A)MAX6707(A) only).
Active-High Reset Output (Push-Pull). RESET changes from low
to high when the V CC input drops below the selected reset
7*
8
7*
8
RESET
threshold (or RST_IN1/RST_IN2 for MAX6701(A)/MAX6702(A)/
MAX6703(A), MR is pulled low, or the watchdog triggers a
reset (MAX6704 only). RESET remains high for the reset
timeout period after the reset conditions are terminated.
Input for User-Adjustable V CC2 Monitor. High-impedance input
for second internal reset comparator. Connect this pin to an
4
—
—
—
RST_IN1
external resistive-divider network to set the reset threshold
voltage; 0.62V (typ) threshold. Connect to V CC when not used.
Reset is asserted when either V CC , RST_IN1, or RST_IN2 are
below threshold.
Input for User-Adjustable V CC3 Monitor. High-impedance input
for third internal reset comparator. Connect this pin to an
5
—
—
—
RST_IN2
external resistive-divider network to set the reset threshold
voltage; 0.62V (typ) threshold. Connect to V CC when not used.
Reset is asserted when either V CC , RST_IN1, or RST_IN2 are
below threshold.
* RESET active-high for the MAX6702(A)/MAX6706(A).
Detailed Description
Figures 1, 2, and 3 are functional diagrams for the
MAX6705(A)/MAX6706(A)/MAX6707(A), MAX6704/
MAX6708, and MAX6701(A)/ MAX6702(A)/MAX6703(A),
respectively.
Reset Output
A microprocessor ’ s (μP ’ s) reset input starts the μP in a
known state. The MAX6701 – MAX6708 assert reset dur-
ing power-up and prevent code execution errors during
power-down or brownout conditions.
On power-up, once V CC reaches 1V, RESET is a guar-
anteed logic low of 0.4V or less. As V CC rises, RESET
stays low. After V CC , RST_IN1, or RST_IN2 rise above
the reset threshold, an internal timer holds RESET low
for about 200ms. RESET pulses low whenever V CC dips
below the reset threshold, including brownout condi-
tions. If a brownout occurs in the middle of a previously
initiated reset pulse, the pulse continues for at least
another 140ms. On power-down, once V CC falls below
the reset threshold, RESET stays low and is guaranteed
to be 0.4V or less, until V CC drops below 1V.
The MAX6702(A)/MAX6704/MAX6706(A)/MAX6708
active-high RESET output is the complement of the
RESET output, and is guaranteed to be valid with V CC
down to 1V.
6
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