参数资料
型号: MAX6722AUTSYD1+T
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: 电源管理
英文描述: Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
中文描述: 3-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO6
封装: LEAD FREE, MO-178AB, SOT-23, 6 PIN
文件页数: 3/43页
文件大小: 948K
代理商: MAX6722AUTSYD1+T
MAX6715A–MAX6729A
Dual/Triple, Ultra-Low-Voltage, SOT23 P
Supervisory Circuits
______________________________________________________________________________________
11
The normal watchdog timeout period (1.12s min)
begins after the first transition on WDI before the con-
clusion of the long initial watchdog period (Figure 2).
During the normal operating mode, the supervisor will
issue a reset pulse for the reset timeout period if the P
does not update the WDI with a valid transition (high-to-
low or low-to-high) within the standard timeout period
(1.12s min).
Leave WDI unconnected to disable the watchdog timer.
The WDI floating-state detector uses a small (200nA typ)
current source. Therefore, do not connect WDI to any-
thing that will source more than 50nA.
Power-Fail Comparator
PFI is the noninverting input to a comparator. If PFI is
less than VPFI (626.5mV), PFO goes low. Common uses
for the power-fail comparator include monitoring prereg-
ulated input of the power supply (such as a battery) or
providing an early power-fail warning so software can
conduct an orderly system shutdown. It can also be
used to monitor supplies other than VCC1 or VCC2 by
setting the power-fail threshold with a resistor-divider, as
shown in Figure 3. PFI is the input to the power-fail com-
parator. The typical comparator delay is 2s from PFI to
PFO. Connect PFI to ground of VCC1 if unused.
Ensuring a Valid Reset Output
Down to VCC = 0V
The MAX6715A–MAX6729A are guaranteed to operate
properly down to VCC = 0.8V. In applications that require
valid reset levels down to VCC = 0V, use a pulldown
resistor at RST to ground. The resistor value used is not
critical, but it must be large enough not to load the reset
output when VCC is above the reset threshold. For most
applications, 100k
is adequate. This configuration does
not work for the open-drain outputs of the MAX6715A/
MAX6717A/MAX6719A/MAX6721A/MAX6723A/MAX6725A/
MAX6727A/MAX6728A. For push-pull, active-high RST
output connect the external resistor as a pullup from RST
to VCC1.
1.12s MAX
tWDI-NORMAL
1.12s MAX
tWDI-STARTUP
35s MAX
VTH
VCC
WDI
RST
tRP
Figure 2. Normal Watchdog Startup Sequence
MAX6728A/
MAX6729A
R1
R2
PFI
GND
VIN
PFO
VTRIP = VPFI
R1 + R2
R2
()
MAX6728A/
MAX6729A
R1
R2
PFI
GND
VCC
VIN
PFO
VTRIP = R2 (VPFI)
1
R1
1
R2
+-
VCC
R1
[]
()
VPFI = 626.5mV
A)
B)
Figure 3. Using Power-Fail Input to Monitor an Additional
Power-Supply a) VIN is Positive b) VIN is Negative
相关PDF资料
PDF描述
MAX6722AUTSYD2+T Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
MAX6722AUTSYD3+ Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
MAX6722AUTSYD4+T Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
MAX6722AUTSYD5+T Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
MAX6722AUTSYD6+T Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
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MAX6722AUTSYD4+T 功能描述:监控电路 RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟(典型值):10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel
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